*needed*? No, I can't. However without changing a bunch of stuff around, doing something like
TEX TEMP[ADDR[0].x], SAMP[reladdr], coord, etc Is going to be tricky. It'd be a little dangerous to use ADDR[1] there since it's meant to be the dimension, and you could easily have, with tessellation, TEX OUT[ADDR[1].x][ADDR[0].x], SAMP[reladdr], ... Now I could obviously rewrite that as TEX TEMP[foo], SAMP[ADDR[0].x], ... UARL ADDR[0] UARL ADDR[1] MOV OUT[ADDR[1].x][ADDR[0].x], TEMP[foo] But then I'd have to somehow communicate the emit() that it needs to arrange for this. Not impossible, but tricky. -ilia On Tue, Aug 5, 2014 at 4:04 PM, Marek Olšák <mar...@gmail.com> wrote: > Could you please show us an example in TGSI where a 3rd address > register is needed? > > Thanks, > > Marek > > On Tue, Aug 5, 2014 at 6:54 AM, Ilia Mirkin <imir...@alum.mit.edu> wrote: >> Hello, >> >> I'm in the process of working out the details of adding dynamic >> sampler support to mesa/st as part of ARB_gpu_shader5. Unfortunately >> I've run into a bit of a roadblock. >> >> One approach I've tried is to load the indirect sampler index into an >> address register and then use that as the offset. However in order to >> realistically support that I need a 3rd address register, while right >> now tgsi_ureg limits it to 2 address registers. Would it be OK to >> relax the restriction to 3? (The reason I need a third is that if e.g. >> the dst has a reladdr, I'd have to change a bunch of stuff to make >> that function properly without a 3rd addr reg, since I can't just MOV >> the sampler to a temp like it does for all the other src's.) >> >> Another apporach I've tried is to just use a TEMP register as the >> indirect offset here. Unfortunately this gets destroyed by >> st_glsl_to_tgsi's various optimizations which assume that temp >> registers can't be reladdr's and so messes up the values. I started >> adding support for that, but then quickly realized that was probably >> not the right thing to do. >> >> So... should I increase the number of address registers to 1? Or is >> there some other simple approach that I'm missing? >> >> Thanks, >> >> -ilia >> _______________________________________________ >> mesa-dev mailing list >> mesa-dev@lists.freedesktop.org >> http://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
