Native integers imply a somewhat different handling of booleans. Instead of being 1.0/0.0 floats, they are 0 (true) / -1 (false) integers. As such the original optimization no longer applies.
Reported-by: Glenn Kennard <glenn.kenn...@gmail.com> Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu> --- This fixes builtin-gl-sample-mask on nvc0, and I presume radeonsi as well. The code being generated was a 31: UMAD TEMP[16], TEMP[15].xxxx, -TEMP[6].xxxx, TEMP[15].xxxx instead of 27: NOT TEMP[14].x, TEMP[6].xxxx ... 32: AND TEMP[17].x, TEMP[14].xxxx, TEMP[16].xxxx Which is not the same when native integers are being used. src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index 27e4615..b818139 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp @@ -1354,7 +1354,7 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b)) */ - if (ir->operation == ir_binop_logic_and) { + if (!native_integers && ir->operation == ir_binop_logic_and) { if (try_emit_mad_for_and_not(ir, 1)) return; if (try_emit_mad_for_and_not(ir, 0)) -- 1.8.5.5 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev