On 13.07.2014 01:35, Marek Olšák wrote:
> From: Marek Olšák <marek.ol...@amd.com>
> 
> This removes the intermediate storage (pm4 state) and generates descriptors
> directly in a staging buffer.
> 
> It also reduces the number of flushes, because the descriptors no longer
> take CS space.

Cool.


> diff --git a/src/gallium/drivers/radeonsi/si_pm4.h 
> b/src/gallium/drivers/radeonsi/si_pm4.h
> index a719586..0702bd4 100644
> --- a/src/gallium/drivers/radeonsi/si_pm4.h
> +++ b/src/gallium/drivers/radeonsi/si_pm4.h
> @@ -76,10 +76,6 @@ void si_pm4_add_bo(struct si_pm4_state *state,
>                  enum radeon_bo_usage usage,
>                  enum radeon_bo_priority priority);
>  
> -void si_pm4_sh_data_begin(struct si_pm4_state *state);
> -void si_pm4_sh_data_add(struct si_pm4_state *state, uint32_t dw);
> -void si_pm4_sh_data_end(struct si_pm4_state *state, unsigned base, unsigned 
> idx);
> -
>  void si_pm4_inval_shader_cache(struct si_pm4_state *state);
>  void si_pm4_inval_texture_cache(struct si_pm4_state *state);
>  

It might be better to split out the removal of the si_pm4_sh_data_*
functions to a separate patch.

Either way though, patches 2-6 are

Reviewed-by: Michel Dänzer <michel.daen...@amd.com>


-- 
Earthling Michel Dänzer            |                  http://www.amd.com
Libre software enthusiast          |                Mesa and X developer
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