On Mon, Jun 30, 2014 at 10:29 AM, Ian Romanick <i...@freedesktop.org> wrote:
> On 06/29/2014 11:18 PM, Matt Turner wrote:
>> To implement the unlit_centroid_workaround, previously we emitted
>>
>> (+f0) pln(8) g20<1>F g16.4<0,1,0>F g4<8,8,1>F { align1 1Q };
>> (-f0) pln(8) g20<1>F g16.4<0,1,0>F g2<8,8,1>F { align1 1Q };
>>
>> where the flag register contains the channel enable bits from g0.
>>
>> Since the predicates are complementary, the pair of pln instructions
>> write to non-overlapping components of the destination, which is the
>> case that the dependency control hints are designed for.
>>
>> Typically setting dependency control hints on predicated instructions
>> isn't safe (if an instruction doesn't execute due to the predicate, it
>> won't update the scoreboard, leaving it in a bad state) but since we
>> must have at least one channel executing (i.e., +f0 is true for some
>> channel) by virtue of the fact that the thread is running, we can put
>> the +f0 pln instruction last and set the hints:
>>
>> (-f0) pln(8) g20<1>F g16.4<0,1,0>F g2<8,8,1>F { align1 NoDDClr 1Q };
>> (+f0) pln(8) g20<1>F g16.4<0,1,0>F g4<8,8,1>F { align1 NoDDChk 1Q };
>
> And there's no chance of instruction scheduling ever putting something
> between? Seems unlikely, but... would be bad.
It can, and does, actually:
(-f0) pln(8) g38<1>F g24.4<0,1,0>F g2<8,8,1>F { NoDDClr };
(-f0) pln(8) g39<1>F g25.4<0,1,0>F g2<8,8,1>F { NoDDClr };
(-f0) pln(8) g42<1>F g26.4<0,1,0>F g2<8,8,1>F { NoDDClr };
(-f0) pln(8) g35<1>F g27.4<0,1,0>F g2<8,8,1>F { NoDDClr };
(+f0) pln(8) g38<1>F g24.4<0,1,0>F g4<8,8,1>F { NoDDChk };
(+f0) pln(8) g39<1>F g25.4<0,1,0>F g4<8,8,1>F { NoDDChk };
(+f0) pln(8) g42<1>F g26.4<0,1,0>F g4<8,8,1>F { NoDDChk };
(+f0) pln(8) g35<1>F g27.4<0,1,0>F g4<8,8,1>F { NoDDChk };
which is safe since the dependency controls are per destination register.
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