We only enable HiZ for miplevels which are aligned on 8x4 blocks. When
debugging HiZ failures, it's useful to know whether a particular
miplevel is using HiZ or not.
Signed-off-by: Kenneth Graunke <kenn...@whitecape.org>
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index a0e637a..4c71e41 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1370,10 +1370,12 @@ intel_miptree_level_enable_hiz(struct brw_context *brw,
* force the proper size alignments.
*/
if (level > 0 && ((width & 7) || (height & 3))) {
+ DBG("mt %p level %d: HiZ DISABLED\n", mt, level);
return false;
}
}
+ DBG("mt %p level %d: HiZ enabled\n", mt, level);
mt->level[level].has_hiz = true;
return true;
}
--
1.9.1
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