The math instruction was Align1-only on Gen6 and we never updated this
to let it use Align16 features like writemasking on newer platforms.
total instructions in shared programs: 1686120 -> 1685507 (-0.04%)
instructions in affected programs: 48593 -> 47980 (-1.26%)
---
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 54a40dd..ee52c07 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -326,7 +326,7 @@ vec4_visitor::emit_math1_gen6(enum opcode opcode, dst_reg
dst, src_reg src)
{
src = fix_math_operand(src);
- if (dst.writemask != WRITEMASK_XYZW) {
+ if (brw->gen == 6 && dst.writemask != WRITEMASK_XYZW) {
/* The gen6 math instruction must be align1, so we can't do
* writemasks.
*/
@@ -379,7 +379,7 @@ vec4_visitor::emit_math2_gen6(enum opcode opcode,
src0 = fix_math_operand(src0);
src1 = fix_math_operand(src1);
- if (dst.writemask != WRITEMASK_XYZW) {
+ if (brw->gen == 6 && dst.writemask != WRITEMASK_XYZW) {
/* The gen6 math instruction must be align1, so we can't do
* writemasks.
*/
--
1.8.3.2
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