---
src/mesa/drivers/dri/i965/brw_vec4.h | 3 +-
src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp | 103 +++++++++++++---------
2 files changed, 63 insertions(+), 43 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index 3a1eb12..a3fa42f 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -753,7 +753,8 @@ public:
const unsigned *generate_assembly(exec_list *insts, unsigned *asm_size);
private:
- void generate_code(exec_list *instructions);
+ void generate_code(exec_list *instructions, int *num_annotations,
+ struct annotation **annotation);
void generate_vec4_instruction(vec4_instruction *inst,
struct brw_reg dst,
struct brw_reg *src);
diff --git a/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
b/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
index e53fd35..5470f87 100644
--- a/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
@@ -22,6 +22,7 @@
*/
#include "brw_vec4.h"
+#include "brw_cfg.h"
extern "C" {
#include "brw_eu.h"
@@ -841,12 +842,10 @@
gen8_vec4_generator::generate_vec4_instruction(vec4_instruction *instruction,
}
void
-gen8_vec4_generator::generate_code(exec_list *instructions)
+gen8_vec4_generator::generate_code(exec_list *instructions,
+ int *num_annotations,
+ struct annotation **annotation)
{
- int last_native_inst_offset = 0;
- const char *last_annotation_string = NULL;
- const void *last_annotation_ir = NULL;
-
if (unlikely(debug_flag)) {
if (shader_prog) {
fprintf(stderr, "Native code for %s vertex shader %d:\n",
@@ -857,32 +856,52 @@ gen8_vec4_generator::generate_code(exec_list
*instructions)
}
}
+ int block_num = 0;
+ int ann_num = 0;
+ int ann_size = 1024;
+ cfg_t *cfg = NULL;
+ struct annotation *ann = NULL;
+
+ if (unlikely(debug_flag)) {
+ cfg = new(mem_ctx) cfg_t(instructions);
+ ann = rzalloc_array(NULL, struct annotation, ann_size);
+ }
+
foreach_list(node, instructions) {
vec4_instruction *ir = (vec4_instruction *) node;
struct brw_reg src[3], dst;
if (unlikely(debug_flag)) {
- if (last_annotation_ir != ir->ir) {
- last_annotation_ir = ir->ir;
- if (last_annotation_ir) {
- fprintf(stderr, " ");
- if (shader_prog) {
- ((ir_instruction *) last_annotation_ir)->fprint(stderr);
- } else {
- const prog_instruction *vpi;
- vpi = (const prog_instruction *) ir->ir;
- fprintf(stderr, "%d: ", (int)(vpi - prog->Instructions));
- _mesa_fprint_instruction_opt(stderr, vpi, 0,
- PROG_PRINT_DEBUG, NULL);
- }
- fprintf(stderr, "\n");
- }
+ if (ann_num == ann_size) {
+ ann_size *= 2;
+ ann = reralloc(NULL, ann, struct annotation, ann_size);
+ }
+
+ ann[ann_num].offset = next_inst_offset;
+ ann[ann_num].ir = ir->ir;
+ ann[ann_num].annotation = ir->annotation;
+
+ if (cfg->blocks[block_num]->start == ir) {
+ ann[ann_num].block_start = cfg->blocks[block_num];
}
- if (last_annotation_string != ir->annotation) {
- last_annotation_string = ir->annotation;
- if (last_annotation_string)
- fprintf(stderr, " %s\n", last_annotation_string);
+
+ /* There is no hardware DO instruction on Gen6+, so since DO always
+ * starts a basic block, we need to set the .block_start of the next
+ * instruction's annotation with a pointer to the bblock started by
+ * the DO.
+ *
+ * There's also only complication from emitting an annotation without
+ * a corresponding hardware instruction to disassemble.
+ */
+ if (brw->gen >= 6 && ir->opcode == BRW_OPCODE_DO) {
+ ann_num--;
}
+
+ if (cfg->blocks[block_num]->end == ir) {
+ ann[ann_num].block_end = cfg->blocks[block_num];
+ block_num++;
+ }
+ ann_num++;
}
for (unsigned int i = 0; i < 3; i++) {
@@ -908,37 +927,37 @@ gen8_vec4_generator::generate_code(exec_list
*instructions)
gen8_set_no_dd_clear(last, ir->no_dd_clear);
gen8_set_no_dd_check(last, ir->no_dd_check);
}
-
- if (unlikely(debug_flag)) {
- gen8_disassemble(brw, store, last_native_inst_offset,
next_inst_offset, stderr);
- }
-
- last_native_inst_offset = next_inst_offset;
- }
-
- if (unlikely(debug_flag)) {
- fprintf(stderr, "\n");
}
patch_jump_targets();
- /* OK, while the INTEL_DEBUG=vs above is very nice for debugging VS
- * emit issues, it doesn't get the jump distances into the output,
- * which is often something we want to debug. So this is here in
- * case you're doing that.
- */
- if (0 && unlikely(debug_flag)) {
- gen8_disassemble(brw, store, 0, next_inst_offset, stderr);
+ if (unlikely(debug_flag)) {
+ if (ann_num == ann_size) {
+ ann = reralloc(NULL, ann, struct annotation, ann_size + 1);
+ }
+ ann[ann_num].offset = next_inst_offset;
}
+ *num_annotations = ann_num;
+ *annotation = ann;
}
const unsigned *
gen8_vec4_generator::generate_assembly(exec_list *instructions,
unsigned *assembly_size)
{
+ struct annotation *annotation;
+ int num_annotations;
+
default_state.access_mode = BRW_ALIGN_16;
default_state.exec_size = BRW_EXECUTE_8;
- generate_code(instructions);
+ generate_code(instructions, &num_annotations, &annotation);
+
+ if (unlikely(debug_flag)) {
+ dump_assembly(store, num_annotations, annotation, brw, prog,
+ gen8_disassemble);
+ ralloc_free(annotation);
+ }
+
*assembly_size = next_inst_offset;
return (const unsigned *) store;
}
--
1.8.3.2
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