On 04/29/2014 04:34 PM, Eric Anholt wrote:
[snip]
> diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
> b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
> index 4222fa8..053612e 100644
> --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
> +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
> @@ -804,9 +804,9 @@ gen6_blorp_emit_depth_stencil_config(struct brw_context
> *brw,
> uint32_t tile_x = draw_x & tile_mask_x;
> uint32_t tile_y = draw_y & tile_mask_y;
> uint32_t offset =
> - intel_region_get_aligned_offset(params->depth.mt->region,
> - draw_x & ~tile_mask_x,
> - draw_y & ~tile_mask_y, false);
> + intel_miptree_get_aligned_offset(params->depth.mt,
> + draw_x & ~tile_mask_x,
> + draw_y & ~tile_mask_y, false);
>
> /* According to the Sandy Bridge PRM, volume 2 part 1, pp326-327
> * (3DSTATE_DEPTH_BUFFER dw5), in the documentation for "Depth
> @@ -856,16 +856,16 @@ gen6_blorp_emit_depth_stencil_config(struct brw_context
> *brw,
>
> /* 3DSTATE_HIER_DEPTH_BUFFER */
> {
> - struct intel_region *hiz_region = params->depth.mt->hiz_mt->region;
> + struct intel_mipmap_tree *hiz_mt = params->depth.mt->hiz_mt;
> uint32_t hiz_offset =
> - intel_region_get_aligned_offset(hiz_region,
> - draw_x & ~tile_mask_x,
> - (draw_y & ~tile_mask_y) / 2, false);
> + intel_miptree_get_aligned_offset(params->depth.mt->hiz_mt,You can just do "hiz_mt" here, rather than "params->depth.mt->hiz_mt". Shorter :) I don't feel confident enough to review patch 8, so I'll trust you and Kristian on that. The rest of the series (1-7, 12-18) are: Reviewed-by: Kenneth Graunke <kenn...@whitecape.org> That said, my review on patch 11 is rather lightweight as well - I was mostly double checking the mechanics of the change. You might also want Kristian's review.
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