From: Marek Olšák <marek.ol...@amd.com>
Changing SX_MISC hangs RV740. When we're at it, let's use DX_RASTERIZATION_KILL
on all R700 and later chipsets.
Cc: 10.0 10.1 mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/r600/evergreen_state.c | 12 ++++++++----
src/gallium/drivers/r600/evergreend.h | 3 +++
src/gallium/drivers/r600/r600_hw_context.c | 4 ++--
src/gallium/drivers/r600/r600_state.c | 12 +++++++++++-
src/gallium/drivers/r600/r600d.h | 3 +++
5 files changed, 27 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/r600/evergreen_state.c
b/src/gallium/drivers/r600/evergreen_state.c
index 6f27790..f7a63a8 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -474,7 +474,8 @@ static void *evergreen_create_rs_state(struct pipe_context
*ctx,
S_028810_PS_UCP_MODE(3) |
S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip) |
S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip) |
- S_028810_DX_LINEAR_ATTR_CLIP_ENA(1);
+ S_028810_DX_LINEAR_ATTR_CLIP_ENA(1) |
+ S_028810_DX_RASTERIZATION_KILL(state->rasterizer_discard);
rs->multisample_enable = state->multisample;
/* offset */
@@ -543,7 +544,6 @@ static void *evergreen_create_rs_state(struct pipe_context
*ctx,
state->fill_back !=
PIPE_POLYGON_MODE_FILL) |
S_028814_POLYMODE_FRONT_PTYPE(r600_translate_fill(state->fill_front)) |
S_028814_POLYMODE_BACK_PTYPE(r600_translate_fill(state->fill_back)));
- r600_store_context_reg(&rs->buffer, R_028350_SX_MISC,
S_028350_MULTIPASS(state->rasterizer_discard));
return rs;
}
@@ -2195,7 +2195,9 @@ void cayman_init_common_regs(struct r600_command_buffer
*cb,
r600_store_context_reg(cb, R_028A4C_PA_SC_MODE_CNTL_1, 0);
- r600_store_context_reg(cb, R_028354_SX_SURFACE_SYNC,
S_028354_SURFACE_SYNC_MASK(0xf));
+ r600_store_context_reg_seq(cb, R_028350_SX_MISC, 2);
+ r600_store_value(cb, 0);
+ r600_store_value(cb, S_028354_SURFACE_SYNC_MASK(0xf));
r600_store_context_reg(cb, R_028800_DB_DEPTH_CONTROL, 0);
}
@@ -2472,7 +2474,9 @@ void evergreen_init_common_regs(struct
r600_command_buffer *cb,
/* The cs checker requires this register to be set. */
r600_store_context_reg(cb, R_028800_DB_DEPTH_CONTROL, 0);
- r600_store_context_reg(cb, R_028354_SX_SURFACE_SYNC,
S_028354_SURFACE_SYNC_MASK(0xf));
+ r600_store_context_reg_seq(cb, R_028350_SX_MISC, 2);
+ r600_store_value(cb, 0);
+ r600_store_value(cb, S_028354_SURFACE_SYNC_MASK(0xf));
return;
}
diff --git a/src/gallium/drivers/r600/evergreend.h
b/src/gallium/drivers/r600/evergreend.h
index 9fde184..a17aff3 100644
--- a/src/gallium/drivers/r600/evergreend.h
+++ b/src/gallium/drivers/r600/evergreend.h
@@ -582,6 +582,9 @@
#define S_028810_VTX_KILL_OR(x) (((x) & 0x1) << 21)
#define G_028810_VTX_KILL_OR(x) (((x) >> 21) & 0x1)
#define C_028810_VTX_KILL_OR 0xFFDFFFFF
+#define S_028810_DX_RASTERIZATION_KILL(x) (((x) & 0x1) << 22)
+#define G_028810_DX_RASTERIZATION_KILL(x) (((x) >> 22) & 0x1)
+#define C_028810_DX_RASTERIZATION_KILL 0xFFBFFFFF
#define S_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((x) & 0x1) << 24)
#define G_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((x) >> 24) & 0x1)
#define C_028810_DX_LINEAR_ATTR_CLIP_ENA 0xFEFFFFFF
diff --git a/src/gallium/drivers/r600/r600_hw_context.c
b/src/gallium/drivers/r600/r600_hw_context.c
index 0aa7f45..de6bcd7 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -81,7 +81,7 @@ void r600_need_cs_space(struct r600_context *ctx, unsigned
num_dw,
}
/* SX_MISC */
- if (ctx->b.chip_class <= R700) {
+ if (ctx->b.chip_class == R600) {
num_dw += 3;
}
@@ -264,7 +264,7 @@ void r600_context_gfx_flush(void *context, unsigned flags,
r600_flush_emit(ctx);
/* old kernels and userspace don't set SX_MISC, so we must reset it to
0 here */
- if (ctx->b.chip_class <= R700) {
+ if (ctx->b.chip_class == R600) {
r600_write_context_reg(cs, R_028350_SX_MISC, 0);
}
diff --git a/src/gallium/drivers/r600/r600_state.c
b/src/gallium/drivers/r600/r600_state.c
index ffcceac..a0ba131 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -460,6 +460,10 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip) |
S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip) |
S_028810_DX_LINEAR_ATTR_CLIP_ENA(1);
+ if (rctx->b.chip_class == R700) {
+ rs->pa_cl_clip_cntl |=
+
S_028810_DX_RASTERIZATION_KILL(state->rasterizer_discard);
+ }
rs->multisample_enable = state->multisample;
/* offset */
@@ -532,7 +536,10 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
if (rctx->b.chip_class == R700) {
r600_store_context_reg(&rs->buffer,
R_028814_PA_SU_SC_MODE_CNTL, rs->pa_su_sc_mode_cntl);
}
- r600_store_context_reg(&rs->buffer, R_028350_SX_MISC,
S_028350_MULTIPASS(state->rasterizer_discard));
+ if (rctx->b.chip_class == R600) {
+ r600_store_context_reg(&rs->buffer, R_028350_SX_MISC,
+
S_028350_MULTIPASS(state->rasterizer_discard));
+ }
return rs;
}
@@ -2397,8 +2404,11 @@ void r600_init_atom_start_cs(struct r600_context *rctx)
r600_store_context_reg(cb, R_0288A4_SQ_PGM_RESOURCES_FS, 0);
+ if (rctx->b.chip_class == R700)
+ r600_store_context_reg(cb, R_028350_SX_MISC, 0);
if (rctx->b.chip_class == R700 && rctx->screen->b.has_streamout)
r600_store_context_reg(cb, R_028354_SX_SURFACE_SYNC,
S_028354_SURFACE_SYNC_MASK(0xf));
+
r600_store_context_reg(cb, R_028800_DB_DEPTH_CONTROL, 0);
if (rctx->screen->b.has_streamout) {
r600_store_context_reg(cb,
R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET, 0);
diff --git a/src/gallium/drivers/r600/r600d.h b/src/gallium/drivers/r600/r600d.h
index 1684429..bb8ca28 100644
--- a/src/gallium/drivers/r600/r600d.h
+++ b/src/gallium/drivers/r600/r600d.h
@@ -543,6 +543,9 @@
#define S_028810_VTX_KILL_OR(x) (((x) & 0x1) << 21)
#define G_028810_VTX_KILL_OR(x) (((x) >> 21) & 0x1)
#define C_028810_VTX_KILL_OR 0xFFDFFFFF
+#define S_028810_DX_RASTERIZATION_KILL(x) (((x) & 0x1) << 22) /*
R700 only? */
+#define G_028810_DX_RASTERIZATION_KILL(x) (((x) >> 22) & 0x1)
+#define C_028810_DX_RASTERIZATION_KILL 0xFFBFFFFF
#define S_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((x) & 0x1) << 24)
#define G_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((x) >> 24) & 0x1)
#define C_028810_DX_LINEAR_ATTR_CLIP_ENA 0xFEFFFFFF
--
1.8.3.2
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