Now you can call the blit functions without worrying about flushing either
too much or too little.
---
src/mesa/drivers/dri/i965/intel_blit.c | 8 +++++---
src/mesa/drivers/dri/i965/intel_buffer_objects.c | 20 --------------------
2 files changed, 5 insertions(+), 23 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c
b/src/mesa/drivers/dri/i965/intel_blit.c
index d482272..992a603 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -431,7 +431,7 @@ intelEmitCopyBlit(struct brw_context *brw,
ADVANCE_BATCH_TILED(dst_y_tiled, src_y_tiled);
- intel_batchbuffer_emit_mi_flush(brw);
+ brw_render_cache_set_add_bo(brw, dst_buffer);
return true;
}
@@ -515,7 +515,7 @@ intelEmitImmediateColorExpandBlit(struct brw_context *brw,
intel_batchbuffer_data(brw, src_bits, dwords * 4, BLT_RING);
- intel_batchbuffer_emit_mi_flush(brw);
+ brw_render_cache_set_add_bo(brw, dst_buffer);
return true;
}
@@ -568,6 +568,8 @@ intel_emit_linear_blit(struct brw_context *brw,
if (!ok)
_mesa_problem(ctx, "Failed to linear blit %dx%d\n", size, 1);
}
+
+ brw_render_cache_set_add_bo(brw, dst_bo);
}
/**
@@ -633,5 +635,5 @@ intel_miptree_set_alpha_to_one(struct brw_context *brw,
OUT_BATCH(0xffffffff); /* white, but only alpha gets written */
ADVANCE_BATCH_TILED(dst_y_tiled, false);
- intel_batchbuffer_emit_mi_flush(brw);
+ brw_render_cache_set_add_bo(brw, region->bo);
}
diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c
b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
index e6124dc..288bff4 100644
--- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c
+++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
@@ -515,12 +515,6 @@ intel_bufferobj_unmap(struct gl_context * ctx, struct
gl_buffer_object *obj,
assert(intel_obj);
assert(obj->Mappings[index].Pointer);
if (intel_obj->range_map_buffer[index] != NULL) {
- /* Since we've emitted some blits to buffers that will (likely) be used
- * in rendering operations in other cache domains in this batch, emit a
- * flush. Once again, we wish for a domain tracker in libdrm to cover
- * usage inside of a batchbuffer.
- */
- intel_batchbuffer_emit_mi_flush(brw);
_mesa_align_free(intel_obj->range_map_buffer[index]);
intel_obj->range_map_buffer[index] = NULL;
} else if (intel_obj->range_map_bo[index] != NULL) {
@@ -536,13 +530,6 @@ intel_bufferobj_unmap(struct gl_context * ctx, struct
gl_buffer_object *obj,
intel_bufferobj_mark_gpu_usage(intel_obj, obj->Mappings[index].Offset,
obj->Mappings[index].Length);
- /* Since we've emitted some blits to buffers that will (likely) be used
- * in rendering operations in other cache domains in this batch, emit a
- * flush. Once again, we wish for a domain tracker in libdrm to cover
- * usage inside of a batchbuffer.
- */
- intel_batchbuffer_emit_mi_flush(brw);
-
drm_intel_bo_unreference(intel_obj->range_map_bo[index]);
intel_obj->range_map_bo[index] = NULL;
} else if (intel_obj->buffer != NULL) {
@@ -607,13 +594,6 @@ intel_bufferobj_copy_subdata(struct gl_context *ctx,
intel_emit_linear_blit(brw,
dst_bo, write_offset,
src_bo, read_offset, size);
-
- /* Since we've emitted some blits to buffers that will (likely) be used
- * in rendering operations in other cache domains in this batch, emit a
- * flush. Once again, we wish for a domain tracker in libdrm to cover
- * usage inside of a batchbuffer.
- */
- intel_batchbuffer_emit_mi_flush(brw);
}
void
--
1.9.0
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