On 02/19/2014 05:40 PM, Kenneth Graunke wrote:
> brw_init_state() calls brw_upload_initial_gpu_state(). If hardware
> contexts are enabled (brw->hw_ctx != NULL), this will upload some
> initial invariant state for the GPU. Without hardware contexts, we
> rely on this state being uploaded via atoms that subscribe to the
> BRW_NEW_CONTEXT bit.
>
> Commit 46d3c2bf4ddd227193b98861f1e632498fe547d8 accidentally moved
> the call to brw_init_state() before creating a hardware context.
> This meant brw_upload_initial_gpu_state would always early return.
> Except on Gen6+, we stopped uploading the initial GPU state via
> state atoms, so it never happened.
>
> Fixes a regression since 46d3c2bf4ddd227193b98861f1e632498fe547d8.
This seems like a rational change... but why didn't 46d3c2b blow up the
world on IVB and HSW? ...and only cause heisenbugs on BDW?
> Cc: "10.0 10.1" <mesa-sta...@lists.freedesktop.org>
> Signed-off-by: Kenneth Graunke <kenn...@whitecape.org>
Either way,
Reviewed-by: Ian Romanick <ian.d.roman...@intel.com>
> ---
> src/mesa/drivers/dri/i965/brw_context.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> The diff looks weird - I actually moved the hardware context initialization
> block up a few lines. Diff instead decided that I moved these three lines
> down below it. Which is equivalent, but...odd.
>
> diff --git a/src/mesa/drivers/dri/i965/brw_context.c
> b/src/mesa/drivers/dri/i965/brw_context.c
> index 5800092..9791a49 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.c
> +++ b/src/mesa/drivers/dri/i965/brw_context.c
> @@ -700,12 +700,6 @@ brwCreateContext(gl_api api,
>
> intel_batchbuffer_init(brw);
>
> - brw_init_state(brw);
> -
> - intelInitExtensions(ctx);
> -
> - intel_fbo_init(brw);
> -
> if (brw->gen >= 6) {
> /* Create a new hardware context. Using a hardware context means that
> * our GPU state will be saved/restored on context switch, allowing us
> @@ -723,6 +717,12 @@ brwCreateContext(gl_api api,
> }
> }
>
> + brw_init_state(brw);
> +
> + intelInitExtensions(ctx);
> +
> + intel_fbo_init(brw);
> +
> brw_init_surface_formats(brw);
>
> if (brw->is_g4x || brw->gen >= 5) {
>
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