It worked only because depth region and hiz region have the same cpp, tiling,
and pitch.
Signed-off-by: Chia-I Wu <o...@lunarg.com>
---
src/mesa/drivers/dri/i965/brw_misc_state.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c
b/src/mesa/drivers/dri/i965/brw_misc_state.c
index ca88b94..4e95c27 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -483,7 +483,7 @@ brw_workaround_depthstencil_alignment(struct brw_context
*brw,
false);
if (intel_renderbuffer_has_hiz(depth_irb)) {
brw->depthstencil.hiz_offset =
- intel_region_get_aligned_offset(depth_mt->region,
+ intel_region_get_aligned_offset(depth_mt->hiz_mt->region,
depth_irb->draw_x & ~tile_mask_x,
(depth_irb->draw_y & ~tile_mask_y)
/
2,
--
1.8.5.3
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