----- Original Message -----
> From: Siavash Eliasi <siavashser...@gmail.com>
>
> v2: Changed allocation alignment of llvmpipe_displaytarget_layout.
>
> Reviewed-by: Ian Romanick <ian.d.roman...@intel.com>
> ---
> src/gallium/drivers/llvmpipe/lp_texture.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/src/gallium/drivers/llvmpipe/lp_texture.c
> b/src/gallium/drivers/llvmpipe/lp_texture.c
> index fe7b9a2..f601181 100644
> --- a/src/gallium/drivers/llvmpipe/lp_texture.c
> +++ b/src/gallium/drivers/llvmpipe/lp_texture.c
> @@ -200,7 +200,7 @@ llvmpipe_displaytarget_layout(struct llvmpipe_screen
> *screen,
> lpr->base.bind,
> lpr->base.format,
> width, height,
> - 16,
> + 64,
> &lpr->row_stride[0] );
>
> if (lpr->dt == NULL)
> @@ -261,7 +261,7 @@ llvmpipe_resource_create(struct pipe_screen *_screen,
> * read/write always LP_RASTER_BLOCK_SIZE pixels, but the element
> * offset doesn't need to be aligned to LP_RASTER_BLOCK_SIZE.
> */
> - lpr->data = align_malloc(bytes + (LP_RASTER_BLOCK_SIZE - 1) * 4 *
> sizeof(float), 16);
> + lpr->data = align_malloc(bytes + (LP_RASTER_BLOCK_SIZE - 1) * 4 *
> sizeof(float), 64);
> /*
> * buffers don't really have stride but it's probably safer
> * (for code doing same calculations for buffers and textures)
> @@ -746,7 +746,7 @@ llvmpipe_get_texture_image_address(struct
> llvmpipe_resource *lpr,
> static void
> alloc_image_data(struct llvmpipe_resource *lpr)
> {
> - uint alignment = MAX2(16, util_cpu_caps.cacheline);
> + uint alignment = MAX2(64, util_cpu_caps.cacheline);
> uint level;
> uint offset = 0;
>
> --
> 1.8.1.4
>
> _______________________________________________
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
Reviewed-by: Jose Fonseca <jfons...@vmware.com>
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