---
src/gallium/drivers/radeonsi/si_state.c | 38 +++++++++++++++++++++++++++------
src/gallium/drivers/radeonsi/si_state.h | 2 +-
2 files changed, 32 insertions(+), 8 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index 7bae72a..67c696d 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -708,7 +708,7 @@ static void *si_create_dsa_state(struct pipe_context *ctx,
struct si_state_dsa *dsa = CALLOC_STRUCT(si_state_dsa);
struct si_pm4_state *pm4 = &dsa->pm4;
unsigned db_depth_control;
- unsigned db_render_override, db_render_control;
+ unsigned db_render_control;
uint32_t db_stencil_control = 0;
if (dsa == NULL) {
@@ -754,10 +754,6 @@ static void *si_create_dsa_state(struct pipe_context *ctx,
/* misc */
db_render_control = 0;
- db_render_override = S_02800C_FORCE_HIZ_ENABLE(V_02800C_FORCE_DISABLE) |
- S_02800C_FORCE_HIS_ENABLE0(V_02800C_FORCE_DISABLE) |
- S_02800C_FORCE_HIS_ENABLE1(V_02800C_FORCE_DISABLE);
- /* TODO db_render_override depends on query */
si_pm4_set_reg(pm4, R_028020_DB_DEPTH_BOUNDS_MIN, 0x00000000);
si_pm4_set_reg(pm4, R_028024_DB_DEPTH_BOUNDS_MAX, 0x00000000);
si_pm4_set_reg(pm4, R_028028_DB_STENCIL_CLEAR, 0x00000000);
@@ -765,12 +761,10 @@ static void *si_create_dsa_state(struct pipe_context *ctx,
//si_pm4_set_reg(pm4, R_028410_SX_ALPHA_TEST_CONTROL,
alpha_test_control);
si_pm4_set_reg(pm4, R_028800_DB_DEPTH_CONTROL, db_depth_control);
si_pm4_set_reg(pm4, R_028000_DB_RENDER_CONTROL, db_render_control);
- si_pm4_set_reg(pm4, R_02800C_DB_RENDER_OVERRIDE, db_render_override);
si_pm4_set_reg(pm4, R_02842C_DB_STENCIL_CONTROL, db_stencil_control);
si_pm4_set_reg(pm4, R_028AC0_DB_SRESULTS_COMPARE_STATE0, 0x0);
si_pm4_set_reg(pm4, R_028AC4_DB_SRESULTS_COMPARE_STATE1, 0x0);
si_pm4_set_reg(pm4, R_028AC8_DB_PRELOAD_CONTROL, 0x0);
- dsa->db_render_override = db_render_override;
return dsa;
}
@@ -1752,6 +1746,7 @@ static void si_db(struct r600_context *rctx, struct
si_pm4_state *pm4,
unsigned macro_aspect, tile_split, stile_split, bankh, bankw, nbanks,
pipe_config;
uint32_t z_info, s_info, db_depth_info;
uint64_t z_offs, s_offs;
+ uint32_t db_render_override, db_htile_data_base, db_htile_surface;
if (state->zsbuf == NULL) {
si_pm4_set_reg(pm4, R_028040_DB_Z_INFO,
S_028040_FORMAT(V_028040_Z_INVALID));
@@ -1836,9 +1831,36 @@ static void si_db(struct r600_context *rctx, struct
si_pm4_state *pm4,
s_info |= S_028044_TILE_MODE_INDEX(tile_mode_index);
}
+ /* TODO HiS aka depth buffer htile goes here */
+ /* TODO db_render_override also depends on query */
+ db_render_override = S_02800C_FORCE_HIS_ENABLE0(V_02800C_FORCE_DISABLE)
|
+ S_02800C_FORCE_HIS_ENABLE1(V_02800C_FORCE_DISABLE);
+
+ /* HiZ aka depth buffer htile */
+ /* use htile only for first level */
+ if (rtex->htile_buffer && !level) {
+ z_info |= S_028040_TILE_SURFACE_ENABLE(1);
+ /* Force off means no force, DB_SHADER_CONTROL decides */
+ db_render_override |=
S_02800C_FORCE_HIZ_ENABLE(V_02800C_FORCE_OFF);
+ uint64_t va = r600_resource_va(&rctx->screen->b.b,
&rtex->htile_buffer->b.b);
+ db_htile_data_base = va >> 8;
+ db_htile_surface = S_028ABC_FULL_CACHE(1);
+ } else {
+ db_render_override |=
S_02800C_FORCE_HIZ_ENABLE(V_02800C_FORCE_DISABLE);
+ db_htile_data_base = 0;
+ db_htile_surface = 0;
+ }
+
+ {
+ struct si_state_dsa *dsa = rctx->queued.named.dsa;
+ dsa->db_render_override = db_render_override;
+ }
+
si_pm4_set_reg(pm4, R_028008_DB_DEPTH_VIEW,
S_028008_SLICE_START(state->zsbuf->u.tex.first_layer) |
S_028008_SLICE_MAX(state->zsbuf->u.tex.last_layer));
+ si_pm4_set_reg(pm4, R_02800C_DB_RENDER_OVERRIDE, db_render_override);
+ si_pm4_set_reg(pm4, R_028014_DB_HTILE_DATA_BASE, db_htile_data_base);
si_pm4_set_reg(pm4, R_02803C_DB_DEPTH_INFO, db_depth_info);
si_pm4_set_reg(pm4, R_028040_DB_Z_INFO, z_info);
@@ -1852,6 +1874,8 @@ static void si_db(struct r600_context *rctx, struct
si_pm4_state *pm4,
si_pm4_set_reg(pm4, R_028058_DB_DEPTH_SIZE,
S_028058_PITCH_TILE_MAX(pitch));
si_pm4_set_reg(pm4, R_02805C_DB_DEPTH_SLICE,
S_02805C_SLICE_TILE_MAX(slice));
+
+ si_pm4_set_reg(pm4, R_028ABC_DB_HTILE_SURFACE, db_htile_surface);
}
#define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \
diff --git a/src/gallium/drivers/radeonsi/si_state.h
b/src/gallium/drivers/radeonsi/si_state.h
index f3d4023..72ca50b 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -61,8 +61,8 @@ struct si_state_dsa {
struct si_pm4_state pm4;
float alpha_ref;
unsigned alpha_func;
- unsigned db_render_override;
unsigned db_render_control;
+ unsigned db_render_override;
uint8_t valuemask[2];
uint8_t writemask[2];
};
--
1.8.3.2
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