Chris Forbes <chr...@ijw.co.nz> writes:
> Just prior to emitting the 3DPRIMITIVE command, we load each of the
> indirect registers. The values loaded are either from offsets into the
> current indirect BO, or constant zero if the parameter is not used for
> this draw.
>
> Enabling use of the indirect registers is done by turning on a bit in
> the first dword of the 3DPRIMITIVE command itself.
>
> V3: - Deduplicate the common part of both indexed and nonindexed indirect
> setup.
> - Just refer to the indirect bo out of the context directly.
>
> Signed-off-by: Chris Forbes <chr...@ijw.co.nz>
> ---
> src/mesa/drivers/dri/i965/brw_draw.c | 57
> ++++++++++++++++++++++++++++++++++--
> 1 file changed, 55 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
> b/src/mesa/drivers/dri/i965/brw_draw.c
> index 0893b6d..4b50666 100644
> --- a/src/mesa/drivers/dri/i965/brw_draw.c
> +++ b/src/mesa/drivers/dri/i965/brw_draw.c
> @@ -206,9 +208,60 @@ static void brw_emit_prim(struct brw_context *brw,
> intel_batchbuffer_emit_mi_flush(brw);
> }
>
> + /* If indirect, emit a bunch of loads from the indirect BO. */
> + if (prim->is_indirect) {
> + struct gl_buffer_object *indirect_buffer = brw->ctx.DrawIndirectBuffer;
> + drm_intel_bo *bo = intel_bufferobj_buffer(brw,
> + intel_buffer_object(indirect_buffer),
> + 0, indirect_buffer->Size);
This would be better as:
drm_intel_bo *bo =
intel_bufferobj_buffer(brw,
intel_buffer_object(indirect_buffer),
prim->indirect_offset, 20);
so you tell the subdata hack the right information (Note that overflow
is safe).
Other than that, and sorting out the resolution of the prim_count == 0
stuff with others (I don't care much), this series is:
Reviewed-by: Eric Anholt <e...@anholt.net>
Sorry for not sending out the individual reviews I'd done on the
previous set of patches.
pgpRTNC4zodrH.pgp
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