That is indeed insane :) Reviewed-by: Chris Forbes <chr...@ijw.co.nz>
On Thu, Oct 31, 2013 at 12:17 PM, Kenneth Graunke <kenn...@whitecape.org> wrote: > Previously, the write of each 32-bit half might land in separate batch > buffers, which is insane. > > Signed-off-by: Kenneth Graunke <kenn...@whitecape.org> > --- > src/mesa/drivers/dri/i965/gen6_queryobj.c | 5 +---- > 1 file changed, 1 insertion(+), 4 deletions(-) > > diff --git a/src/mesa/drivers/dri/i965/gen6_queryobj.c > b/src/mesa/drivers/dri/i965/gen6_queryobj.c > index 56e9d5d..5b469b5 100644 > --- a/src/mesa/drivers/dri/i965/gen6_queryobj.c > +++ b/src/mesa/drivers/dri/i965/gen6_queryobj.c > @@ -112,14 +112,11 @@ brw_store_register_mem64(struct brw_context *brw, > /* MI_STORE_REGISTER_MEM only stores a single 32-bit value, so to > * read a full 64-bit register, we need to do two of them. > */ > - BEGIN_BATCH(3); > + BEGIN_BATCH(6); > OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2)); > OUT_BATCH(reg); > OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, > idx * sizeof(uint64_t)); > - ADVANCE_BATCH(); > - > - BEGIN_BATCH(3); > OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2)); > OUT_BATCH(reg + sizeof(uint32_t)); > OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, > -- > 1.8.3.2 > > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
