Hi Marek,
I've pushed this along with the other original tbuffer patch.
-Tom
On Mon, Sep 09, 2013 at 10:36:12PM +0200, Marek Olšák wrote:
> Signed-off-by: Marek Olšák <marek.ol...@amd.com>
> ---
> test/CodeGen/R600/llvm.SI.tbuffer.store.ll | 40
> ++++++++++++++++++++++++++++++
> 1 file changed, 40 insertions(+)
> create mode 100644 test/CodeGen/R600/llvm.SI.tbuffer.store.ll
>
> diff --git a/test/CodeGen/R600/llvm.SI.tbuffer.store.ll
> b/test/CodeGen/R600/llvm.SI.tbuffer.store.ll
> new file mode 100644
> index 0000000..80b246c
> --- /dev/null
> +++ b/test/CodeGen/R600/llvm.SI.tbuffer.store.ll
> @@ -0,0 +1,40 @@
> +;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s
> +
> +;CHECK: TBUFFER_STORE_FORMAT_XYZW
> {{VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+}}, 32, -1, 0, -1, 0, 14, 4,
> {{VGPR[0-9]+}}, {{SGPR[0-9]+_SGPR[0-9]+_SGPR[0-9]+_SGPR[0-9]+}}, -1, 0, 0
> +define void @test1(i32 %a1, i32 %vaddr) {
> + %vdata = insertelement <4 x i32> undef, i32 %a1, i32 0
> + call void @llvm.SI.tbuffer.store.v4i32(<16 x i8> undef, <4 x i32> %vdata,
> + i32 4, i32 %vaddr, i32 0, i32 32, i32 14, i32 4, i32 1, i32 0, i32 1,
> + i32 1, i32 0)
> + ret void
> +}
> +
> +;CHECK: TBUFFER_STORE_FORMAT_XYZ
> {{VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+}}, 24, -1, 0, -1, 0, 13, 4,
> {{VGPR[0-9]+}}, {{SGPR[0-9]+_SGPR[0-9]+_SGPR[0-9]+_SGPR[0-9]+}}, -1, 0, 0
> +define void @test2(i32 %a1, i32 %vaddr) {
> + %vdata = insertelement <4 x i32> undef, i32 %a1, i32 0
> + call void @llvm.SI.tbuffer.store.v4i32(<16 x i8> undef, <4 x i32> %vdata,
> + i32 3, i32 %vaddr, i32 0, i32 24, i32 13, i32 4, i32 1, i32 0, i32 1,
> + i32 1, i32 0)
> + ret void
> +}
> +
> +;CHECK: TBUFFER_STORE_FORMAT_XY {{VGPR[0-9]+_VGPR[0-9]+}}, 16, -1, 0, -1, 0,
> 11, 4, {{VGPR[0-9]+}}, {{SGPR[0-9]+_SGPR[0-9]+_SGPR[0-9]+_SGPR[0-9]+}}, -1,
> 0, 0
> +define void @test3(i32 %a1, i32 %vaddr) {
> + %vdata = insertelement <2 x i32> undef, i32 %a1, i32 0
> + call void @llvm.SI.tbuffer.store.v2i32(<16 x i8> undef, <2 x i32> %vdata,
> + i32 2, i32 %vaddr, i32 0, i32 16, i32 11, i32 4, i32 1, i32 0, i32 1,
> + i32 1, i32 0)
> + ret void
> +}
> +
> +;CHECK: TBUFFER_STORE_FORMAT_X {{VGPR[0-9]+}}, 8, -1, 0, -1, 0, 4, 4,
> {{VGPR[0-9]+}}, {{SGPR[0-9]+_SGPR[0-9]+_SGPR[0-9]+_SGPR[0-9]+}}, -1, 0, 0
> +define void @test4(i32 %vdata, i32 %vaddr) {
> + call void @llvm.SI.tbuffer.store.i32(<16 x i8> undef, i32 %vdata,
> + i32 1, i32 %vaddr, i32 0, i32 8, i32 4, i32 4, i32 1, i32 0, i32 1,
> + i32 1, i32 0)
> + ret void
> +}
> +
> +declare void @llvm.SI.tbuffer.store.i32(<16 x i8>, i32, i32, i32, i32, i32,
> i32, i32, i32, i32, i32, i32, i32)
> +declare void @llvm.SI.tbuffer.store.v2i32(<16 x i8>, <2 x i32>, i32, i32,
> i32, i32, i32, i32, i32, i32, i32, i32, i32)
> +declare void @llvm.SI.tbuffer.store.v4i32(<16 x i8>, <4 x i32>, i32, i32,
> i32, i32, i32, i32, i32, i32, i32, i32, i32)
> --
> 1.8.1.2
>
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