It's a ?: that operates per-component on vectors. Will be used in
upcoming lowering pass for ldexp and the implementation of frexp.
cond_sel(selector, a, b):
per-component result = selector ? a : b
---
src/glsl/ir.cpp | 2 ++
src/glsl/ir.h | 12 ++++++++++++
src/glsl/ir_builder.cpp | 6 ++++++
src/glsl/ir_builder.h | 1 +
src/glsl/ir_constant_expression.cpp | 8 ++++++++
src/glsl/ir_validate.cpp | 7 +++++++
src/mesa/program/ir_to_mesa.cpp | 1 +
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 1 +
8 files changed, 38 insertions(+)
diff --git a/src/glsl/ir.cpp b/src/glsl/ir.cpp
index 8769c32..65d9811 100644
--- a/src/glsl/ir.cpp
+++ b/src/glsl/ir.cpp
@@ -435,6 +435,7 @@ ir_expression::ir_expression(int op, ir_rvalue *op0,
ir_rvalue *op1,
break;
case ir_triop_bfi:
+ case ir_triop_cond_sel:
this->type = op1->type;
break;
@@ -552,6 +553,7 @@ static const char *const operator_strs[] = {
"vector_extract",
"fma",
"lrp",
+ "cond_sel",
"bfi",
"bitfield_extract",
"vector_insert",
diff --git a/src/glsl/ir.h b/src/glsl/ir.h
index bfbb94c..79e4ec8 100644
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -1197,6 +1197,18 @@ enum ir_expression_operation {
ir_triop_lrp,
/**
+ * \name Conditional Select
+ *
+ * A vector conditional select instruction (like ?:, but operating per-
+ * component on vectors).
+ *
+ * \see lower_instructions_visitor::ldexp_to_arith
+ */
+ /*@{*/
+ ir_triop_cond_sel,
+ /*@}*/
+
+ /**
* \name Second half of a lowered bitfieldInsert() operation.
*
* \see lower_instructions::bitfield_insert_to_bfm_bfi
diff --git a/src/glsl/ir_builder.cpp b/src/glsl/ir_builder.cpp
index 31a457d..d0a8480 100644
--- a/src/glsl/ir_builder.cpp
+++ b/src/glsl/ir_builder.cpp
@@ -479,6 +479,12 @@ lrp(operand a, operand b, operand c)
}
ir_expression *
+cond_sel(operand a, operand b, operand c)
+{
+ return expr(ir_triop_cond_sel, a, b, c);
+}
+
+ir_expression *
bitfield_insert(operand a, operand b, operand c, operand d)
{
void *mem_ctx = ralloc_parent(a.val);
diff --git a/src/glsl/ir_builder.h b/src/glsl/ir_builder.h
index ce593e2..1414509 100644
--- a/src/glsl/ir_builder.h
+++ b/src/glsl/ir_builder.h
@@ -182,6 +182,7 @@ ir_expression *f2b(operand a);
ir_expression *b2f(operand a);
ir_expression *lrp(operand a, operand b, operand c);
+ir_expression *cond_sel(operand a, operand b, operand c);
ir_expression *bitfield_insert(operand a, operand b, operand c, operand d);
ir_swizzle *swizzle(operand a, int swizzle, int components);
diff --git a/src/glsl/ir_constant_expression.cpp
b/src/glsl/ir_constant_expression.cpp
index ec338a8..c2b5da5 100644
--- a/src/glsl/ir_constant_expression.cpp
+++ b/src/glsl/ir_constant_expression.cpp
@@ -395,6 +395,7 @@ ir_expression::constant_expression_value(struct hash_table
*variable_context)
case ir_binop_lshift:
case ir_binop_rshift:
case ir_binop_vector_extract:
+ case ir_triop_cond_sel:
case ir_triop_bitfield_extract:
break;
@@ -1399,6 +1400,13 @@ ir_expression::constant_expression_value(struct
hash_table *variable_context)
break;
}
+ case ir_triop_cond_sel:
+ for (unsigned c = 0; c < components; c++) {
+ data.u[c] = op[0]->value.b[c] ? op[1]->value.u[c]
+ : op[2]->value.u[c];
+ }
+ break;
+
case ir_triop_vector_insert: {
const unsigned idx = op[2]->value.u[0];
diff --git a/src/glsl/ir_validate.cpp b/src/glsl/ir_validate.cpp
index 37f26fe..d302dd8 100644
--- a/src/glsl/ir_validate.cpp
+++ b/src/glsl/ir_validate.cpp
@@ -529,6 +529,13 @@ ir_validate::visit_leave(ir_expression *ir)
assert(ir->operands[2]->type == ir->operands[0]->type ||
ir->operands[2]->type == glsl_type::float_type);
break;
+ case ir_triop_cond_sel:
+ assert(ir->operands[0]->type->base_type == GLSL_TYPE_BOOL);
+ assert(ir->type->vector_elements ==
ir->operands[0]->type->vector_elements);
+ assert(ir->type == ir->operands[1]->type);
+ assert(ir->type == ir->operands[2]->type);
+ break;
+
case ir_triop_bfi:
assert(ir->operands[0]->type->is_integer());
assert(ir->operands[1]->type == ir->operands[2]->type);
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index fe9cac0..ded0329 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -1497,6 +1497,7 @@ ir_to_mesa_visitor::visit(ir_expression *ir)
case ir_triop_bitfield_extract:
case ir_triop_vector_insert:
case ir_quadop_bitfield_insert:
+ case ir_triop_cond_sel:
assert(!"not supported");
break;
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index d4c4260..2e94dac 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -1979,6 +1979,7 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir)
case ir_quadop_vector:
case ir_binop_vector_extract:
case ir_triop_vector_insert:
+ case ir_triop_cond_sel:
/* This operation is not supported, or should have already been handled.
*/
assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
--
1.8.3.2
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