---
src/gallium/drivers/radeonsi/r600_blit.c | 10 +++++-----
src/gallium/drivers/radeonsi/r600_resource.h | 2 +-
src/gallium/drivers/radeonsi/r600_texture.c | 2 +-
src/gallium/drivers/radeonsi/si_state_draw.c | 2 +-
4 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/r600_blit.c
b/src/gallium/drivers/radeonsi/r600_blit.c
index 421aab3..bab108e 100644
--- a/src/gallium/drivers/radeonsi/r600_blit.c
+++ b/src/gallium/drivers/radeonsi/r600_blit.c
@@ -114,7 +114,7 @@ void si_blit_uncompress_depth(struct pipe_context *ctx,
struct r600_texture *flushed_depth_texture = staging ?
staging : texture->flushed_depth_texture;
- if (!staging && !texture->dirty_db_mask)
+ if (!staging && !texture->dirty_level_mask)
return;
desc =
util_format_description(flushed_depth_texture->resource.b.b.format);
@@ -133,7 +133,7 @@ void si_blit_uncompress_depth(struct pipe_context *ctx,
}
for (level = first_level; level <= last_level; level++) {
- if (!staging && !(texture->dirty_db_mask & (1 << level)))
+ if (!staging && !(texture->dirty_level_mask & (1 << level)))
continue;
/* The smaller the mipmap level, the less layers there are
@@ -166,7 +166,7 @@ void si_blit_uncompress_depth(struct pipe_context *ctx,
/* The texture will always be dirty if some layers aren't
flushed.
* I don't think this case can occur though. */
if (!staging && first_layer == 0 && last_layer == max_layer) {
- texture->dirty_db_mask &= ~(1 << level);
+ texture->dirty_level_mask &= ~(1 << level);
}
}
}
@@ -182,7 +182,7 @@ static void si_blit_decompress_depth_in_place(struct
r600_context *rctx,
surf_tmpl.format = texture->resource.b.b.format;
for (level = first_level; level <= last_level; level++) {
- if (!(texture->dirty_db_mask & (1 << level)))
+ if (!(texture->dirty_level_mask & (1 << level)))
continue;
surf_tmpl.u.tex.level = level;
@@ -210,7 +210,7 @@ static void si_blit_decompress_depth_in_place(struct
r600_context *rctx,
/* The texture will always be dirty if some layers aren't
flushed.
* I don't think this case occurs often though. */
if (first_layer == 0 && last_layer == max_layer) {
- texture->dirty_db_mask &= ~(1 << level);
+ texture->dirty_level_mask &= ~(1 << level);
}
}
}
diff --git a/src/gallium/drivers/radeonsi/r600_resource.h
b/src/gallium/drivers/radeonsi/r600_resource.h
index 19cc1d9..24db2a9 100644
--- a/src/gallium/drivers/radeonsi/r600_resource.h
+++ b/src/gallium/drivers/radeonsi/r600_resource.h
@@ -49,7 +49,7 @@ struct r600_texture {
unsigned pitch_override;
unsigned is_depth;
- unsigned dirty_db_mask; /* each bit says if that
miplevel is dirty */
+ unsigned dirty_level_mask; /* each bit says if
that miplevel is dirty */
struct r600_texture *flushed_depth_texture;
boolean is_flushing_texture;
struct radeon_surface surface;
diff --git a/src/gallium/drivers/radeonsi/r600_texture.c
b/src/gallium/drivers/radeonsi/r600_texture.c
index 5b9cad1..8b0f6a4 100644
--- a/src/gallium/drivers/radeonsi/r600_texture.c
+++ b/src/gallium/drivers/radeonsi/r600_texture.c
@@ -658,7 +658,7 @@ bool r600_init_flushed_depth_texture(struct pipe_context
*ctx,
if (staging)
resource.flags |= R600_RESOURCE_FLAG_TRANSFER;
else
- rtex->dirty_db_mask = (1 << (resource.last_level+1)) - 1;
+ rtex->dirty_level_mask = (1 << (resource.last_level+1)) - 1;
*flushed_depth_texture = (struct r600_texture
*)ctx->screen->resource_create(ctx->screen, &resource);
if (*flushed_depth_texture == NULL) {
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c
b/src/gallium/drivers/radeonsi/si_state_draw.c
index 45cfcc4..3363d46 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -726,7 +726,7 @@ void si_draw_vbo(struct pipe_context *ctx, const struct
pipe_draw_info *info)
struct pipe_surface *surf = rctx->framebuffer.zsbuf;
struct r600_texture *rtex = (struct r600_texture
*)surf->texture;
- rtex->dirty_db_mask |= 1 << surf->u.tex.level;
+ rtex->dirty_level_mask |= 1 << surf->u.tex.level;
}
pipe_resource_reference(&ib.buffer, NULL);
--
1.8.1.2
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