Thanks Tom. Also as discussed on IRC, I checked the v2i32 expand change against piglits cl/program/execute/*stack*.cl test cases, as well as the v2i32 test that just sent to the piglit list. The tests were run on a Radeon 5400, and all of them passed with the Expand'ed v2i32 loads/stores.
--Aaron
On Thu, Jun 20, 2013 at 4:30 PM, Tom Stellard <t...@stellard.net> wrote:
> On Wed, Jun 19, 2013 at 08:51:01AM -0700, Tom Stellard wrote:
>> On Mon, Jun 17, 2013 at 04:11:38PM -0500, Aaron Watry wrote:
>> > The custom lowering causes llc to crash with a segfault.
>> >
>> > Ideally, the custom lowering can be fixed, but this allows
>> > programs which load/store v2i32 to work without crashing.
>> >
>> > Signed-off-by: Aaron Watry<awa...@gmail.com>
>> > ---
>> > lib/Target/R600/R600ISelLowering.cpp | 4 ++--
>> > test/CodeGen/R600/load.vec.ll | 6 ++++++
>> > 2 files changed, 8 insertions(+), 2 deletions(-)
>> >
>> > diff --git a/lib/Target/R600/R600ISelLowering.cpp
>> > b/lib/Target/R600/R600ISelLowering.cpp
>> > index 9cedadb..812df83 100644
>> > --- a/lib/Target/R600/R600ISelLowering.cpp
>> > +++ b/lib/Target/R600/R600ISelLowering.cpp
>> > @@ -86,7 +86,7 @@ R600TargetLowering::R600TargetLowering(TargetMachine
>> > &TM) :
>> >
>> > // Legalize loads and stores to the private address space.
>> > setOperationAction(ISD::LOAD, MVT::i32, Custom);
>> > - setOperationAction(ISD::LOAD, MVT::v2i32, Custom);
>> > + setOperationAction(ISD::LOAD, MVT::v2i32, Expand);
>> > setOperationAction(ISD::LOAD, MVT::v4i32, Custom);
>> > setLoadExtAction(ISD::EXTLOAD, MVT::v4i8, Custom);
>> > setLoadExtAction(ISD::EXTLOAD, MVT::i8, Custom);
>> > @@ -94,7 +94,7 @@ R600TargetLowering::R600TargetLowering(TargetMachine
>> > &TM) :
>> > setLoadExtAction(ISD::ZEXTLOAD, MVT::v4i8, Custom);
>> > setOperationAction(ISD::STORE, MVT::i8, Custom);
>> > setOperationAction(ISD::STORE, MVT::i32, Custom);
>> > - setOperationAction(ISD::STORE, MVT::v2i32, Custom);
>> > + setOperationAction(ISD::STORE, MVT::v2i32, Expand);
>>
>> We have to use custom lowering in order for things like constant loads
>> and global stores to work, so I think we need to fix whatever crash is
>> happening with custom lowering.
>>
>
> As you pointed out on IRC, since v2[if]32 loads are expanded to [if]32
> loads and we custom lower those, this patch should work fine. I will
> push this series.
>
> Thanks,
> Tom
>> > setOperationAction(ISD::STORE, MVT::v4i32, Custom);
>> >
>> > setOperationAction(ISD::LOAD, MVT::i32, Custom);
>> > diff --git a/test/CodeGen/R600/load.vec.ll b/test/CodeGen/R600/load.vec.ll
>> > index 08e034e..da1149a 100644
>> > --- a/test/CodeGen/R600/load.vec.ll
>> > +++ b/test/CodeGen/R600/load.vec.ll
>> > @@ -1,6 +1,10 @@
>> > +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck
>> > --check-prefix=EG-CHECK %s
>> > ; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI-CHECK
>> > %s
>> >
>> > ; load a v2i32 value from the global address space.
>> > +; EG-CHECK: @load_v2i32
>> > +; EG-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 4
>> > +; EG-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
>> > ; SI-CHECK: @load_v2i32
>> > ; SI-CHECK: BUFFER_LOAD_DWORDX2 VGPR{{[0-9]+}}
>> > define void @load_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32>
>> > addrspace(1)* %in) {
>> > @@ -10,6 +14,8 @@ define void @load_v2i32(<2 x i32> addrspace(1)* %out, <2
>> > x i32> addrspace(1)* %i
>> > }
>> >
>> > ; load a v4i32 value from the global address space.
>> > +; EG-CHECK: @load_v4i32
>> > +; EG-CHECK: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0
>> > ; SI-CHECK: @load_v4i32
>> > ; SI-CHECK: BUFFER_LOAD_DWORDX4 VGPR{{[0-9]+}}
>> > define void @load_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32>
>> > addrspace(1)* %in) {
>> > --
>> > 1.8.1.2
>> >
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>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
v2i32-stack.cl
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