This should fix build issues with GCC < 4.3

Signed-off-by: Vadim Girlin <vadimgir...@gmail.com>
---

cc: Lauri Kasanen <c...@gmx.com>
Lauri, please test to make sure that I didn't miss anything.

 src/gallium/drivers/r600/r600_shader.c       |  6 +++---
 src/gallium/drivers/r600/sb/sb_bc.h          |  4 ++--
 src/gallium/drivers/r600/sb/sb_bc_parser.cpp | 10 +++++-----
 src/gallium/drivers/r600/sb/sb_ra_init.cpp   |  2 +-
 src/gallium/drivers/r600/sb/sb_sched.cpp     |  8 ++++----
 5 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_shader.c 
b/src/gallium/drivers/r600/r600_shader.c
index fd3fe39..49218e5 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -1005,7 +1005,7 @@ static int tgsi_declaration(struct r600_shader_ctx *ctx)
                                r600_add_gpr_array(ctx->shader,
                                               
ctx->file_offset[TGSI_FILE_TEMPORARY] +
                                                                   
d->Range.First,
-                                              d->Range.Last - d->Range.First + 
1, 0b1111);
+                                              d->Range.Last - d->Range.First + 
1, 0x0F);
                        }
                }
                break;
@@ -1421,13 +1421,13 @@ static int r600_shader_from_tgsi(struct r600_screen 
*rscreen,
                        r600_add_gpr_array(shader, 
ctx.file_offset[TGSI_FILE_INPUT],
                                           ctx.file_offset[TGSI_FILE_OUTPUT] -
                                           ctx.file_offset[TGSI_FILE_INPUT],
-                                          0b1111);
+                                          0x0F);
                }
                if (ctx.info.indirect_files & (1 << TGSI_FILE_OUTPUT)) {
                        r600_add_gpr_array(shader, 
ctx.file_offset[TGSI_FILE_OUTPUT],
                                           ctx.file_offset[TGSI_FILE_TEMPORARY] 
-
                                           ctx.file_offset[TGSI_FILE_OUTPUT],
-                                          0b1111);
+                                          0x0F);
                }
        }
 
diff --git a/src/gallium/drivers/r600/sb/sb_bc.h 
b/src/gallium/drivers/r600/sb/sb_bc.h
index 0b9bc07..9c6ed46 100644
--- a/src/gallium/drivers/r600/sb/sb_bc.h
+++ b/src/gallium/drivers/r600/sb/sb_bc.h
@@ -553,9 +553,9 @@ public:
                unsigned mask = 0;
                unsigned slot_flags = alu_slots(op_ptr);
                if (slot_flags & AF_V)
-                       mask = 0b01111;
+                       mask = 0x0F;
                if (!is_cayman() && (slot_flags & AF_S))
-                       mask |= 0b10000;
+                       mask |= 0x10;
                return mask;
        }
 
diff --git a/src/gallium/drivers/r600/sb/sb_bc_parser.cpp 
b/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
index cc75528..e1478d3 100644
--- a/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
@@ -126,7 +126,7 @@ int bc_parser::parse_decls() {
 
 #if SB_NO_ARRAY_INFO
 
-               sh->add_gpr_array(0, pshader->bc.ngpr, 0b1111);
+               sh->add_gpr_array(0, pshader->bc.ngpr, 0x0F);
 
 #else
 
@@ -140,7 +140,7 @@ int bc_parser::parse_decls() {
                        }
 
                } else {
-                       sh->add_gpr_array(0, pshader->bc.ngpr, 0b1111);
+                       sh->add_gpr_array(0, pshader->bc.ngpr, 0x0F);
                }
 
 
@@ -149,7 +149,7 @@ int bc_parser::parse_decls() {
        }
 
        if (sh->target == TARGET_VS)
-               sh->add_input(0, 1, 0b1111);
+               sh->add_input(0, 1, 0x0F);
 
        bool ps_interp = ctx.hw_class >= HW_CLASS_EVERGREEN
                        && sh->target == TARGET_PS;
@@ -159,7 +159,7 @@ int bc_parser::parse_decls() {
        for (unsigned i = 0; i < pshader->ninput; ++i) {
                r600_shader_io & in = pshader->input[i];
                bool preloaded = sh->target == TARGET_PS && !(ps_interp && 
in.spi_sid);
-               sh->add_input(in.gpr, preloaded, /*in.write_mask*/ 0b1111);
+               sh->add_input(in.gpr, preloaded, /*in.write_mask*/ 0x0F);
                if (ps_interp && in.spi_sid) {
                        if (in.interpolate == TGSI_INTERPOLATE_LINEAR ||
                                        in.interpolate == 
TGSI_INTERPOLATE_COLOR)
@@ -176,7 +176,7 @@ int bc_parser::parse_decls() {
                unsigned gpr = 0;
 
                while (mask) {
-                       sh->add_input(gpr, true, mask & 0b1111);
+                       sh->add_input(gpr, true, mask & 0x0F);
                        ++gpr;
                        mask >>= 4;
                }
diff --git a/src/gallium/drivers/r600/sb/sb_ra_init.cpp 
b/src/gallium/drivers/r600/sb/sb_ra_init.cpp
index 75b2d5d..0447f29 100644
--- a/src/gallium/drivers/r600/sb/sb_ra_init.cpp
+++ b/src/gallium/drivers/r600/sb/sb_ra_init.cpp
@@ -360,7 +360,7 @@ void ra_init::color_bs_constraint(ra_constraint* c) {
        regbits rb(ctx.alu_temp_gprs);
 
        unsigned chan_count[4] = {};
-       unsigned allowed_chans = 0b1111;
+       unsigned allowed_chans = 0x0F;
 
        for (vvec::iterator I = vv.begin(), E = vv.end(); I != E; ++I) {
                value *v = *I;
diff --git a/src/gallium/drivers/r600/sb/sb_sched.cpp 
b/src/gallium/drivers/r600/sb/sb_sched.cpp
index 06c362a..7e9eacc 100644
--- a/src/gallium/drivers/r600/sb/sb_sched.cpp
+++ b/src/gallium/drivers/r600/sb/sb_sched.cpp
@@ -312,7 +312,7 @@ alu_group_tracker::alu_group_tracker(shader &sh)
          has_mova(), uses_ar(), has_predset(), has_kill(),
          updates_exec_mask(), chan_count(), interp_param(), next_id() {
 
-       available_slots = sh.get_ctx().has_trans ? 0b11111 : 0b01111;
+       available_slots = sh.get_ctx().has_trans ? 0x1F : 0x0F;
 }
 
 inline
@@ -678,7 +678,7 @@ void alu_group_tracker::reset(bool keep_packed) {
        has_predset = false;
        has_kill = false;
        updates_exec_mask = false;
-       available_slots = sh.get_ctx().has_trans ? 0b11111 : 0b01111;
+       available_slots = sh.get_ctx().has_trans ? 0x1F : 0x0F;
        interp_param = 0;
 
        chan_count[0] = 0;
@@ -1471,7 +1471,7 @@ unsigned post_scheduler::try_add_instruction(node *n) {
                if (d) {
                        slot = d->get_final_chan();
                        a->bc.dst_chan = slot;
-                       allowed_slots &= (1 << slot) | 0b10000;
+                       allowed_slots &= (1 << slot) | 0x10;
                } else {
                        if (a->bc.op_ptr->flags & AF_MOVA) {
                                if (a->bc.slot_flags & AF_V)
@@ -1484,7 +1484,7 @@ unsigned post_scheduler::try_add_instruction(node *n) {
                // FIXME workaround for some problems with MULADD in trans slot 
on r700,
                // (is it really needed on r600?)
                if (a->bc.op == ALU_OP3_MULADD && !ctx.is_egcm()) {
-                       allowed_slots &= 0b01111;
+                       allowed_slots &= 0x0F;
                }
 
                if (!allowed_slots) {
-- 
1.8.2.1

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