On Tue, Mar 05, 2013 at 07:51:02PM +0100, Tom Stellard wrote:
> On Tue, Mar 05, 2013 at 03:27:19PM +0100, Christian König wrote:
> > From: Christian König <christian.koe...@amd.com>
> >
> > Signed-off-by: Christian König <christian.koe...@amd.com>
>
> This series has my r-b, but I'd like to test it on r600,
> before you push it.
>
Hi Christian,
There is one issue I had to fix, so please add the attached patch to the
series when you commit. There is also a related change to the LLVM patchset,
but I'll send that fix to the llvm list. With these two fixes, both series are
safe to commit.
Also, since this change will make mesa incompatible with older LLVM versions,
could you commit the LLVM changes first and then put the revision number
in a file called LLVM_REVISION.txt in drivers/radeon. I think keeping
track of this will help us if we need to bisect.
Thanks,
Tom
> -Tom
>
> > ---
> > src/gallium/drivers/radeonsi/radeonsi_shader.c | 31
> > +++++++++---------------
> > 1 file changed, 12 insertions(+), 19 deletions(-)
> >
> > diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c
> > b/src/gallium/drivers/radeonsi/radeonsi_shader.c
> > index 7922928..958d3a3 100644
> > --- a/src/gallium/drivers/radeonsi/radeonsi_shader.c
> > +++ b/src/gallium/drivers/radeonsi/radeonsi_shader.c
> > @@ -84,10 +84,9 @@ static struct si_shader_context * si_shader_context(
> >
> > enum sgpr_type {
> > SGPR_CONST_PTR_F32,
> > - SGPR_CONST_PTR_V4I32,
> > - SGPR_CONST_PTR_V8I32,
> > - SGPR_I32,
> > - SGPR_I64
> > + SGPR_CONST_PTR_V16I8,
> > + SGPR_CONST_PTR_V32I8,
> > + SGPR_I32
> > };
> >
> > /**
> > @@ -149,22 +148,17 @@ static LLVMValueRef use_sgpr(
> > ret_type = LLVMInt32TypeInContext(gallivm->context);
> > break;
> >
> > - case SGPR_I64:
> > + case SGPR_CONST_PTR_V16I8:
> > assert(sgpr % 2 == 0);
> > - ret_type= LLVMInt64TypeInContext(gallivm->context);
> > - break;
> > -
> > - case SGPR_CONST_PTR_V4I32:
> > - assert(sgpr % 2 == 0);
> > - ret_type = LLVMInt32TypeInContext(gallivm->context);
> > - ret_type = LLVMVectorType(ret_type, 4);
> > + ret_type = LLVMInt8TypeInContext(gallivm->context);
> > + ret_type = LLVMVectorType(ret_type, 16);
> > ret_type = LLVMPointerType(ret_type, CONST_ADDR_SPACE);
> > break;
> >
> > - case SGPR_CONST_PTR_V8I32:
> > + case SGPR_CONST_PTR_V32I8:
> > assert(sgpr % 2 == 0);
> > - ret_type = LLVMInt32TypeInContext(gallivm->context);
> > - ret_type = LLVMVectorType(ret_type, 8);
> > + ret_type = LLVMInt8TypeInContext(gallivm->context);
> > + ret_type = LLVMVectorType(ret_type, 32);
> > ret_type = LLVMPointerType(ret_type, CONST_ADDR_SPACE);
> > break;
> >
> > @@ -197,7 +191,7 @@ static void declare_input_vs(
> > unsigned chan;
> >
> > /* Load the T list */
> > - t_list_ptr = use_sgpr(base->gallivm, SGPR_CONST_PTR_V4I32,
> > SI_SGPR_VERTEX_BUFFER);
> > + t_list_ptr = use_sgpr(base->gallivm, SGPR_CONST_PTR_V16I8,
> > SI_SGPR_VERTEX_BUFFER);
> >
> > t_offset = lp_build_const_int32(base->gallivm, input_index);
> >
> > @@ -478,7 +472,6 @@ static void si_llvm_init_export_args(struct
> > lp_build_tgsi_context *bld_base,
> > int cbuf = target - V_008DFC_SQ_EXP_MRT;
> >
> > if (cbuf >= 0 && cbuf < 8) {
> > - struct r600_context *rctx = si_shader_ctx->rctx;
> > compressed = (si_shader_ctx->key.export_16bpc >> cbuf)
> > & 0x1;
> >
> > if (compressed)
> > @@ -945,14 +938,14 @@ static void tex_fetch_args(
> > emit_data->args[1] = lp_build_gather_values(gallivm, address, count);
> >
> > /* Resource */
> > - ptr = use_sgpr(bld_base->base.gallivm, SGPR_CONST_PTR_V8I32,
> > SI_SGPR_RESOURCE);
> > + ptr = use_sgpr(bld_base->base.gallivm, SGPR_CONST_PTR_V32I8,
> > SI_SGPR_RESOURCE);
> > offset = lp_build_const_int32(bld_base->base.gallivm,
> > emit_data->inst->Src[1].Register.Index);
> > emit_data->args[2] = build_indexed_load(bld_base->base.gallivm,
> > ptr, offset);
> >
> > /* Sampler */
> > - ptr = use_sgpr(bld_base->base.gallivm, SGPR_CONST_PTR_V4I32,
> > SI_SGPR_SAMPLER);
> > + ptr = use_sgpr(bld_base->base.gallivm, SGPR_CONST_PTR_V16I8,
> > SI_SGPR_SAMPLER);
> > offset = lp_build_const_int32(bld_base->base.gallivm,
> > emit_data->inst->Src[1].Register.Index);
> > emit_data->args[3] = build_indexed_load(bld_base->base.gallivm,
> > --
> > 1.7.9.5
> >
> _______________________________________________
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/mesa-dev
>From 8839de966658f7e31d739c5e6ba430f976984451 Mon Sep 17 00:00:00 2001
From: Tom Stellard <thomas.stell...@amd.com>
Date: Wed, 6 Mar 2013 13:34:56 -0500
Subject: [PATCH] r600g/llvm: Update CONSTANT_BUFFER address space definition
to match recent LLVM changes.
---
src/gallium/drivers/r600/r600_llvm.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c
index 7fe15be..c7aa45f 100644
--- a/src/gallium/drivers/r600/r600_llvm.c
+++ b/src/gallium/drivers/r600/r600_llvm.c
@@ -20,7 +20,7 @@
#if defined R600_USE_LLVM || defined HAVE_OPENCL
-#define CONSTANT_BUFFER_0_ADDR_SPACE 9
+#define CONSTANT_BUFFER_0_ADDR_SPACE 8
#define CONSTANT_BUFFER_1_ADDR_SPACE (CONSTANT_BUFFER_0_ADDR_SPACE + R600_UCP_CONST_BUFFER)
static LLVMValueRef llvm_fetch_const(
--
1.7.3.4
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