[Mesa-dev] [PATCH 3/5] r600g: pad the DMA CS to a multiple of 8 dwords

[Marek Olšák]

NOTE: This is a candidate for the 9.1 branch.
---
 src/gallium/drivers/r600/r600_pipe.c |   16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_pipe.c 
b/src/gallium/drivers/r600/r600_pipe.c
index e2d86e9..27c98ec 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -23,6 +23,7 @@
 #include "r600_pipe.h"
 #include "r600_public.h"
 #include "r600_isa.h"
+#include "r600d.h"
 
 #include <errno.h>
 #include "pipe/p_shader_tokens.h"
@@ -166,12 +167,23 @@ static void r600_flush_gfx_ring(void *ctx, unsigned flags)
 static void r600_flush_dma_ring(void *ctx, unsigned flags)
 {
        struct r600_context *rctx = (struct r600_context *)ctx;
+       struct radeon_winsys_cs *cs = rctx->rings.dma.cs;
+       unsigned padding_dw, i;
 
-       if (!rctx->rings.dma.cs->cdw) {
+       if (!cs->cdw) {
                return;
        }
+
+       /* Pad the DMA CS to a multiple of 8 dwords. */
+       padding_dw = 8 - cs->cdw % 8;
+       if (padding_dw < 8) {
+               for (i = 0; i < padding_dw; i++) {
+                       cs->buf[cs->cdw++] = DMA_PACKET(DMA_PACKET_NOP, 0, 0, 
0);
+               }
+       }
+
        rctx->rings.dma.flushing = true;
-       rctx->ws->cs_flush(rctx->rings.dma.cs, flags);
+       rctx->ws->cs_flush(cs, flags);
        rctx->rings.dma.flushing = false;
 }
 
-- 
1.7.10.4

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