From: Michel Dänzer <michel.daen...@amd.com>
11 more little piglits.
NOTE: This is a candidate for the 9.1 branch.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
v2: Marek pointed out there actually is a hardware bit for this as of
Cayman. :)
src/gallium/drivers/radeonsi/si_state.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index d20e3ff..dc12520 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1617,7 +1617,7 @@ static void si_cb(struct r600_context *rctx, struct
si_pm4_state *pm4,
struct r600_surface *surf;
unsigned level = state->cbufs[cb]->u.tex.level;
unsigned pitch, slice;
- unsigned color_info;
+ unsigned color_info, color_attrib;
unsigned tile_mode_index;
unsigned format, swap, ntype, endian;
uint64_t offset;
@@ -1705,6 +1705,9 @@ static void si_cb(struct r600_context *rctx, struct
si_pm4_state *pm4,
S_028C70_NUMBER_TYPE(ntype) |
S_028C70_ENDIAN(endian);
+ color_attrib = S_028C74_TILE_MODE_INDEX(tile_mode_index) |
+ S_028C74_FORCE_DST_ALPHA_1(desc->swizzle[3] ==
UTIL_FORMAT_SWIZZLE_1);
+
offset += r600_resource_va(rctx->context.screen,
state->cbufs[cb]->texture);
offset >>= 8;
@@ -1722,8 +1725,7 @@ static void si_cb(struct r600_context *rctx, struct
si_pm4_state *pm4,
S_028C6C_SLICE_MAX(state->cbufs[cb]->u.tex.last_layer));
}
si_pm4_set_reg(pm4, R_028C70_CB_COLOR0_INFO + cb * 0x3C, color_info);
- si_pm4_set_reg(pm4, R_028C74_CB_COLOR0_ATTRIB + cb * 0x3C,
- S_028C74_TILE_MODE_INDEX(tile_mode_index));
+ si_pm4_set_reg(pm4, R_028C74_CB_COLOR0_ATTRIB + cb * 0x3C,
color_attrib);
/* Determine pixel shader export format */
max_comp_size = si_colorformat_max_comp_size(format);
--
1.8.1.3
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