From: Tom Stellard <thomas.stell...@amd.com>
NOTE: This is a candidate for the Mesa stable branch.
---
lib/Target/R600/R600RegisterInfo.td | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/lib/Target/R600/R600RegisterInfo.td
b/lib/Target/R600/R600RegisterInfo.td
index 3812eb7..a7d847a 100644
--- a/lib/Target/R600/R600RegisterInfo.td
+++ b/lib/Target/R600/R600RegisterInfo.td
@@ -81,7 +81,7 @@ def R600_Addr : RegisterClass <"AMDGPU", [i32], 127, (add
(sequence "Addr%u_X",
} // End isAllocatable = 0
def R600_TReg32_X : RegisterClass <"AMDGPU", [f32, i32], 32,
- (add (sequence "T%u_X", 0, 127))>;
+ (add (sequence "T%u_X", 0, 127), AR_X)>;
def R600_TReg32_Y : RegisterClass <"AMDGPU", [f32, i32], 32,
(add (sequence "T%u_Y", 0, 127))>;
--
1.7.8.6
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