[Mesa-dev] [PATCH] R600/SI: Do not fold single instruction with more that 3 kcache read

[Vincent Lejeune]

It fixes around 100 tfb piglit tests and 16 glean tests.

NOTE: This is a candidate for the Mesa stable branch.
---
 lib/Target/R600/AMDILISelDAGToDAG.cpp  | 2 ++
 lib/Target/R600/R600LowerConstCopy.cpp | 2 +-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/Target/R600/AMDILISelDAGToDAG.cpp 
b/lib/Target/R600/AMDILISelDAGToDAG.cpp
index 2f34fe3..858eb5d 100644
--- a/lib/Target/R600/AMDILISelDAGToDAG.cpp
+++ b/lib/Target/R600/AMDILISelDAGToDAG.cpp
@@ -358,6 +358,8 @@ bool AMDGPUDAGToDAGISel::FoldOperands(unsigned Opcode,
     SDValue Operand = Ops[OperandIdx[i] - 1];
     switch (Operand.getOpcode()) {
     case AMDGPUISD::CONST_ADDRESS: {
+      if (i == 2)
+        break;
       SDValue CstOffset;
       if (!Operand.getValueType().isVector() &&
           SelectGlobalValueConstantOffset(Operand.getOperand(0), CstOffset)) {
diff --git a/lib/Target/R600/R600LowerConstCopy.cpp 
b/lib/Target/R600/R600LowerConstCopy.cpp
index 2557e8f..c8c27a8 100644
--- a/lib/Target/R600/R600LowerConstCopy.cpp
+++ b/lib/Target/R600/R600LowerConstCopy.cpp
@@ -180,7 +180,7 @@ bool 
R600LowerConstCopy::runOnMachineFunction(MachineFunction &MF) {
             int ConstMovSel =
                 TII->getOperandIdx(CstMov->getOpcode(), 
R600Operands::SRC0_SEL);
             unsigned ConstIndex = CstMov->getOperand(ConstMovSel).getImm();
-            if (canFoldInBundle(CP, ConstIndex)) {
+            if (MI->isInsideBundle() && canFoldInBundle(CP, ConstIndex)) {
               TII->setImmOperand(MI, OpTable[SrcOp][1], ConstIndex);
               MI->getOperand(SrcIdx).setReg(AMDGPU::ALU_CONST);
             } else {
-- 
1.8.1.2

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