From: Christian König <christian.koe...@amd.com>
With the llvm patches, fixing 14 piglit tests in total.
v2: increase the const limit
Signed-off-by: Christian König <christian.koe...@amd.com>
---
src/gallium/drivers/radeonsi/radeonsi_pipe.c | 2 +-
src/gallium/drivers/radeonsi/radeonsi_shader.c | 6 ------
2 files changed, 1 insertion(+), 7 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.c
b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
index 744dac4..5394f5d 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_pipe.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
@@ -456,7 +456,7 @@ static int r600_get_shader_param(struct pipe_screen*
pscreen, unsigned shader, e
/* FIXME Isn't this equal to TEMPS? */
return 1; /* Max native address registers */
case PIPE_SHADER_CAP_MAX_CONSTS:
- return 64;
+ return 4096;
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 1;
case PIPE_SHADER_CAP_MAX_PREDS:
diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c
b/src/gallium/drivers/radeonsi/radeonsi_shader.c
index 65372b7..4ec3d4f 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_shader.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_shader.c
@@ -455,12 +455,6 @@ static LLVMValueRef fetch_constant(
* CONST[0].x will have an offset of 0 and CONST[1].x will have an
* offset of 4. */
idx = (reg->Register.Index * 4) + swizzle;
-
- /* index loads above 255 are currently not supported */
- if (idx > 255) {
- assert(0);
- idx = 0;
- }
offset = lp_build_const_int32(base->gallivm, idx);
load = build_indexed_load(base->gallivm, const_ptr, offset);
--
1.7.9.5
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