---
lib/Target/AMDGPU/AMDGPU.h | 1 +
lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 1 +
lib/Target/AMDGPU/R600VolatileLoadSetter.cpp | 51 ++++++++++++++++++++++++++++
3 files changed, 53 insertions(+)
create mode 100644 lib/Target/AMDGPU/R600VolatileLoadSetter.cpp
diff --git a/lib/Target/AMDGPU/AMDGPU.h b/lib/Target/AMDGPU/AMDGPU.h
index 9897e0d..14bc173 100644
--- a/lib/Target/AMDGPU/AMDGPU.h
+++ b/lib/Target/AMDGPU/AMDGPU.h
@@ -20,6 +20,7 @@ class FunctionPass;
class AMDGPUTargetMachine;
// R600 Passes
+FunctionPass *createR600VolatileLoadSetter();
FunctionPass* createR600AllocateMemoryRegsPass(TargetMachine &tm);
FunctionPass* createR600KernelParametersPass(const DataLayout *TD);
FunctionPass *createR600ExpandSpecialInstrsPass(TargetMachine &tm);
diff --git a/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
b/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index 5210849..ecb8da0 100644
--- a/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -95,6 +95,7 @@ TargetPassConfig
*AMDGPUTargetMachine::createPassConfig(PassManagerBase &PM) {
bool
AMDGPUPassConfig::addPreISel()
{
+ addPass(createR600VolatileLoadSetter());
return false;
}
diff --git a/lib/Target/AMDGPU/R600VolatileLoadSetter.cpp
b/lib/Target/AMDGPU/R600VolatileLoadSetter.cpp
new file mode 100644
index 0000000..8138bd8
--- /dev/null
+++ b/lib/Target/AMDGPU/R600VolatileLoadSetter.cpp
@@ -0,0 +1,51 @@
+//===-- R600AllocateMemoryRegs.cpp - Indirect Adressing Support
-----------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This pass force every load instruction to be set as volatile.
+// For non power of 2 vectors, LLVM always uses tinier vector store
instructions
+// to match the exact size of the original vector ; on the other hand it
+// can load vector using bigger vector load instructions if the load is marked
+// as non volatile, which can lead to inconsistent store/load operations
+// in AMDGPU backend. This pass force all load instructions to be volatile.
+//
+//===----------------------------------------------------------------------===//
+
+#include "AMDGPU.h"
+#include "llvm/Pass.h"
+#include "llvm/Support/InstVisitor.h"
+
+namespace llvm {
+
+class LLVM_LIBRARY_VISIBILITY R600VolatileLoadSetter :
+ public FunctionPass, public InstVisitor<R600VolatileLoadSetter>
+{
+public:
+ static char ID;
+ R600VolatileLoadSetter() : FunctionPass(ID) { }
+ ~R600VolatileLoadSetter() { }
+ bool runOnFunction(Function &F) {
+ visit(F);
+ return true;
+ }
+
+ const char *getPassName() const { return "R600 Set Volatile to Load Inst"; }
+
+ void visitLoadInst(LoadInst &I) {
+ I.setVolatile(true);
+ }
+};
+
+char R600VolatileLoadSetter::ID = 0;
+
+
+FunctionPass *createR600VolatileLoadSetter() {
+ return new R600VolatileLoadSetter();
+}
+
+}
--
1.7.11.7
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