---
lib/Target/AMDGPU/R600ISelLowering.cpp | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/lib/Target/AMDGPU/R600ISelLowering.cpp
b/lib/Target/AMDGPU/R600ISelLowering.cpp
index c837705..c6d9c4a 100644
--- a/lib/Target/AMDGPU/R600ISelLowering.cpp
+++ b/lib/Target/AMDGPU/R600ISelLowering.cpp
@@ -450,7 +450,9 @@ SDValue R600TargetLowering::LowerOperation(SDValue Op,
SelectionDAG &DAG) const
return CreateLiveInRegister(DAG, &AMDGPU::R600_TReg32RegClass, Reg, VT);
}
case AMDGPUIntrinsic::R600_load_input_perspective: {
- unsigned slot = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
+ int slot = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
+ if (slot < 0)
+ return DAG.getUNDEF(MVT::f32);
SDValue FullVector = DAG.getNode(
AMDGPUISD::INTERP,
DL, MVT::v4f32,
@@ -459,7 +461,9 @@ SDValue R600TargetLowering::LowerOperation(SDValue Op,
SelectionDAG &DAG) const
DL, VT, FullVector, DAG.getConstant(slot % 4, MVT::i32));
}
case AMDGPUIntrinsic::R600_load_input_linear: {
- unsigned slot = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
+ int slot = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
+ if (slot < 0)
+ return DAG.getUNDEF(MVT::f32);
SDValue FullVector = DAG.getNode(
AMDGPUISD::INTERP,
DL, MVT::v4f32,
@@ -468,7 +472,9 @@ SDValue R600TargetLowering::LowerOperation(SDValue Op,
SelectionDAG &DAG) const
DL, VT, FullVector, DAG.getConstant(slot % 4, MVT::i32));
}
case AMDGPUIntrinsic::R600_load_input_constant: {
- unsigned slot = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
+ int slot = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
+ if (slot < 0)
+ return DAG.getUNDEF(MVT::f32);
SDValue FullVector = DAG.getNode(
AMDGPUISD::INTERP_P0,
DL, MVT::v4f32,
--
1.7.11.7
_______________________________________________
mesa-dev mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
