From: Tom Stellard <thomas.stell...@amd.com>
---
This change needs the drm patch I sent to the list in order to work:
radeon: Allow N x 1 x 1 surfaces for evergreen+
src/gallium/drivers/r600/r600_texture.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/r600_texture.c
b/src/gallium/drivers/r600/r600_texture.c
index 1c52ff8..7dc3fa5 100644
--- a/src/gallium/drivers/r600/r600_texture.c
+++ b/src/gallium/drivers/r600/r600_texture.c
@@ -119,6 +119,7 @@ static int r600_init_surface(struct r600_screen *rscreen,
}
switch (ptex->target) {
case PIPE_TEXTURE_1D:
+ case PIPE_BUFFER:
surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_1D, TYPE);
break;
case PIPE_TEXTURE_RECT:
@@ -139,7 +140,6 @@ static int r600_init_surface(struct r600_screen *rscreen,
case PIPE_TEXTURE_CUBE:
surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_CUBEMAP,
TYPE);
break;
- case PIPE_BUFFER:
default:
return -EINVAL;
}
--
1.7.11.4
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