On Fri, Aug 31, 2012 at 4:57 AM, Vadim Girlin <vadimgir...@gmail.com> wrote:
> Use 1/256 for R6xx/7xx, 1/4096 for evergreen, instead of default 1/16.
>
> Helps to pass some piglit tests (fbo, multisample).
>
> Signed-off-by: Vadim Girlin <vadimgir...@gmail.com>
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
> ---
> src/gallium/drivers/r600/evergreen_state.c | 3 ++-
> src/gallium/drivers/r600/evergreend.h | 11 +++++++++++
> src/gallium/drivers/r600/r600_state.c | 3 ++-
> src/gallium/drivers/r600/r600d.h | 9 +++++++++
> 4 files changed, 24 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/r600/evergreen_state.c
> b/src/gallium/drivers/r600/evergreen_state.c
> index 28a83f2..bda8ed5 100644
> --- a/src/gallium/drivers/r600/evergreen_state.c
> +++ b/src/gallium/drivers/r600/evergreen_state.c
> @@ -920,7 +920,8 @@ static void *evergreen_create_rs_state(struct
> pipe_context *ctx,
>
> S_028C08_PIX_CENTER_HALF(state->gl_rasterization_rules));
> } else {
> r600_pipe_state_add_reg(rstate, R_028C08_PA_SU_VTX_CNTL,
> -
> S_028C08_PIX_CENTER_HALF(state->gl_rasterization_rules));
> +
> S_028C08_PIX_CENTER_HALF(state->gl_rasterization_rules) |
> +
> S_028C08_QUANT_MODE(V_028C08_X_1_4096TH));
> }
> r600_pipe_state_add_reg(rstate, R_028B7C_PA_SU_POLY_OFFSET_CLAMP,
> fui(state->offset_clamp));
> r600_pipe_state_add_reg(rstate, R_028814_PA_SU_SC_MODE_CNTL,
> diff --git a/src/gallium/drivers/r600/evergreend.h
> b/src/gallium/drivers/r600/evergreend.h
> index 91d78f8..e4d72f5 100644
> --- a/src/gallium/drivers/r600/evergreend.h
> +++ b/src/gallium/drivers/r600/evergreend.h
> @@ -1955,6 +1955,17 @@
> #define S_028C08_PIX_CENTER_HALF(x) (((x) & 0x1) << 0)
> #define G_028C08_PIX_CENTER_HALF(x) (((x) >> 0) & 0x1)
> #define C_028C08_PIX_CENTER_HALF 0xFFFFFFFE
> +#define S_028C08_QUANT_MODE(x) (((x) & 0x7) << 3)
> +#define G_028C08_QUANT_MODE(x) (((x) >> 3) & 0x7)
> +#define C_028C08_QUANT_MODE 0xFFFFFFC7
> +#define V_028C08_X_1_16TH 0x00
> +#define V_028C08_X_1_8TH 0x01
> +#define V_028C08_X_1_4TH 0x02
> +#define V_028C08_X_1_2 0x03
> +#define V_028C08_X_1 0x04
> +#define V_028C08_X_1_256TH 0x05
> +#define V_028C08_X_1_1024TH 0x06
> +#define V_028C08_X_1_4096TH 0x07
> #define R_028C0C_PA_CL_GB_VERT_CLIP_ADJ 0x00028C0C
> #define R_028C10_PA_CL_GB_VERT_DISC_ADJ 0x00028C10
> #define R_028C14_PA_CL_GB_HORZ_CLIP_ADJ 0x00028C14
> diff --git a/src/gallium/drivers/r600/r600_state.c
> b/src/gallium/drivers/r600/r600_state.c
> index 26db24b..53bbdd9 100644
> --- a/src/gallium/drivers/r600/r600_state.c
> +++ b/src/gallium/drivers/r600/r600_state.c
> @@ -948,7 +948,8 @@ static void *r600_create_rs_state(struct pipe_context
> *ctx,
> r600_pipe_state_add_reg(rstate, R_028A4C_PA_SC_MODE_CNTL,
> sc_mode_cntl);
>
> r600_pipe_state_add_reg(rstate, R_028C08_PA_SU_VTX_CNTL,
> -
> S_028C08_PIX_CENTER_HALF(state->gl_rasterization_rules));
> +
> S_028C08_PIX_CENTER_HALF(state->gl_rasterization_rules) |
> + S_028C08_QUANT_MODE(V_028C08_X_1_256TH));
>
> r600_pipe_state_add_reg(rstate, R_028DFC_PA_SU_POLY_OFFSET_CLAMP,
> fui(state->offset_clamp));
> r600_pipe_state_add_reg(rstate, R_028814_PA_SU_SC_MODE_CNTL,
> diff --git a/src/gallium/drivers/r600/r600d.h
> b/src/gallium/drivers/r600/r600d.h
> index a6da0a2..28423e1 100644
> --- a/src/gallium/drivers/r600/r600d.h
> +++ b/src/gallium/drivers/r600/r600d.h
> @@ -2194,6 +2194,15 @@
> #define S_028C08_PIX_CENTER_HALF(x) (((x) & 0x1) << 0)
> #define G_028C08_PIX_CENTER_HALF(x) (((x) >> 0) & 0x1)
> #define C_028C08_PIX_CENTER_HALF 0xFFFFFFFE
> +#define S_028C08_QUANT_MODE(x) (((x) & 0x7) << 3)
> +#define G_028C08_QUANT_MODE(x) (((x) >> 3) & 0x7)
> +#define C_028C08_QUANT_MODE 0xFFFFFFC7
> +#define V_028C08_X_1_16TH 0x00
> +#define V_028C08_X_1_8TH 0x01
> +#define V_028C08_X_1_4TH 0x02
> +#define V_028C08_X_1_2 0x03
> +#define V_028C08_X_1 0x04
> +#define V_028C08_X_1_256TH 0x05
> #define R_028C1C_PA_SC_AA_SAMPLE_LOCS_MCTX 0x028C1C
> #define R_028C48_PA_SC_AA_MASK 0x028C48
> #define R_028810_PA_CL_CLIP_CNTL 0x028810
> --
> 1.7.11.4
>
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