On Wed, Aug 08, 2012 at 09:41:44AM +0200, Daniel Vetter wrote: > On Tue, Aug 07, 2012 at 04:05:33PM -0700, Kenneth Graunke wrote: > > Separate out the depth stall from the depth count write. Workarounds > > say that a depth stall needs to be preceeded with a non-zero post-sync > > op (in this case, the depth count write). Also, before the non-zero > > post-sync op, we need a CS stall, which needs a stall at scoreboard. > > > > Signed-off-by: Daniel Vetter <daniel.vet...@ffwll.ch> > > Signed-off-by: Kenneth Graunke <kenn...@whitecape.org> > > In my understanding of Bspec (haven't done any experiments on hw) we need > to set the depth stall bit on the pipe_control with the depth_count write > (bspec for both snb&ivb even says that depth stall should be disable if > post sync op != write_depth). So I think we need to keep these two > together and simply emit the entire nonzero postsync op workaround on > gen6, like we already do for render cache flushes. > > In my reading of bspec, no such workaround is required on gen7+
I've forgotten to add: The other patches look good, for all of them safe this on: Reviewed-by: Daniel Vetter <daniel.vet...@ffwll.ch> -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
