This requires the latest streamout kernel patches.
Streamout is disabled by default on r7xx, so this patch is safe for regular
users.
---
src/gallium/drivers/r600/r600_hw_context.c | 14 ++++++++++++++
src/gallium/drivers/r600/r600d.h | 1 +
2 files changed, 15 insertions(+)
diff --git a/src/gallium/drivers/r600/r600_hw_context.c
b/src/gallium/drivers/r600/r600_hw_context.c
index 1b1c6f4..9303d09 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -1331,6 +1331,7 @@ void r600_context_streamout_begin(struct r600_context
*ctx)
12 + /* flush_vgt_streamout */
6 + /* set_streamout_enable */
util_bitcount(buffer_en) * 7 + /* SET_CONTEXT_REG */
+ (ctx->chip_class == R700 ? util_bitcount(buffer_en)
* 5 : 0) + /* STRMOUT_BASE_UPDATE */
util_bitcount(buffer_en &
ctx->streamout_append_bitmask) * 8 + /* STRMOUT_BUFFER_UPDATE */
util_bitcount(buffer_en &
~ctx->streamout_append_bitmask) * 6 + /* STRMOUT_BUFFER_UPDATE */
(ctx->family > CHIP_R600 && ctx->family < CHIP_RV770
? 2 : 0) + /* SURFACE_BASE_UPDATE */
@@ -1366,6 +1367,19 @@ void r600_context_streamout_begin(struct r600_context
*ctx)
r600_context_bo_reloc(ctx,
r600_resource(t[i]->b.buffer),
RADEON_USAGE_WRITE);
+ /* R7xx requires this packet after updating BUFFER_BASE.
+ * Without this, R7xx locks up. */
+ if (ctx->chip_class == R700) {
+ cs->buf[cs->cdw++] =
PKT3(PKT3_STRMOUT_BASE_UPDATE, 1, 0);
+ cs->buf[cs->cdw++] = i;
+ cs->buf[cs->cdw++] = va >> 8;
+
+ cs->buf[cs->cdw++] = PKT3(PKT3_NOP, 0, 0);
+ cs->buf[cs->cdw++] =
+ r600_context_bo_reloc(ctx,
r600_resource(t[i]->b.buffer),
+
RADEON_USAGE_WRITE);
+ }
+
if (ctx->streamout_append_bitmask & (1 << i)) {
va = r600_resource_va(&ctx->screen->screen,
(void*)t[i]->filled_size);
diff --git a/src/gallium/drivers/r600/r600d.h b/src/gallium/drivers/r600/r600d.h
index 933d99e..ab36d73 100644
--- a/src/gallium/drivers/r600/r600d.h
+++ b/src/gallium/drivers/r600/r600d.h
@@ -106,6 +106,7 @@
#define PKT3_SET_RESOURCE 0x6D
#define PKT3_SET_SAMPLER 0x6E
#define PKT3_SET_CTL_CONST 0x6F
+#define PKT3_STRMOUT_BASE_UPDATE 0x72
#define PKT3_SURFACE_BASE_UPDATE 0x73
#define SURFACE_BASE_UPDATE_DEPTH (1 << 0)
#define SURFACE_BASE_UPDATE_COLOR(x) (2 << (x))
--
1.7.9.5
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