please ignore, there is actually a use of that, but not through TGSI. On Fri, Mar 6, 2020 at 3:07 PM Karol Herbst <kher...@redhat.com> wrote: > > we can rely on the value we get through the cso > > Signed-off-by: Karol Herbst <kher...@redhat.com> > --- > src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 1 - > src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 1 - > src/gallium/drivers/nouveau/nv50/nv50_program.c | 4 +--- > src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 4 +--- > 4 files changed, 2 insertions(+), 8 deletions(-) > > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h > b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h > index 322bdd02557..1bd9bb36bf9 100644 > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h > @@ -89,7 +89,6 @@ struct nv50_ir_prog_info > int16_t maxGPR; /* may be -1 if none used */ > int16_t maxOutput; > uint32_t tlsSpace; /* required local memory per thread */ > - uint32_t smemSize; /* required shared memory per block */ > uint32_t *code; > uint32_t codeSize; > uint32_t instructions; > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp > b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp > index bd78b76f384..89d515804bc 100644 > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp > @@ -1281,7 +1281,6 @@ Converter::parseNIR() > info->prop.cp.numThreads[0] = nir->info.cs.local_size[0]; > info->prop.cp.numThreads[1] = nir->info.cs.local_size[1]; > info->prop.cp.numThreads[2] = nir->info.cs.local_size[2]; > - info->bin.smemSize = nir->info.cs.shared_size; > break; > case Program::TYPE_FRAGMENT: > info->prop.fp.earlyFragTests = nir->info.fs.early_fragment_tests; > diff --git a/src/gallium/drivers/nouveau/nv50/nv50_program.c > b/src/gallium/drivers/nouveau/nv50/nv50_program.c > index c9d01e8cee7..31edce2ea3d 100644 > --- a/src/gallium/drivers/nouveau/nv50/nv50_program.c > +++ b/src/gallium/drivers/nouveau/nv50/nv50_program.c > @@ -350,7 +350,6 @@ nv50_program_translate(struct nv50_program *prog, > uint16_t chipset, > return false; > } > > - info->bin.smemSize = prog->cp.smem_size; > info->io.auxCBSlot = 15; > info->io.ucpBase = NV50_CB_AUX_UCP_OFFSET; > info->io.genUserClip = prog->vp.clpd_nr; > @@ -398,7 +397,6 @@ nv50_program_translate(struct nv50_program *prog, > uint16_t chipset, > prog->interps = info->bin.fixupData; > prog->max_gpr = MAX2(4, (info->bin.maxGPR >> 1) + 1); > prog->tls_space = info->bin.tlsSpace; > - prog->cp.smem_size = info->bin.smemSize; > prog->mul_zero_wins = info->io.mul_zero_wins; > prog->vp.need_vertex_id = info->io.vertexId < PIPE_MAX_SHADER_INPUTS; > > @@ -447,7 +445,7 @@ nv50_program_translate(struct nv50_program *prog, > uint16_t chipset, > > pipe_debug_message(debug, SHADER_INFO, > "type: %d, local: %d, shared: %d, gpr: %d, inst: %d, > bytes: %d", > - prog->type, info->bin.tlsSpace, info->bin.smemSize, > + prog->type, info->bin.tlsSpace, prog->cp.smem_size, > prog->max_gpr, info->bin.instructions, > info->bin.codeSize); > > diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c > b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c > index 128b94e1da5..5a9e0311101 100644 > --- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c > +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c > @@ -603,7 +603,6 @@ nvc0_program_translate(struct nvc0_program *prog, > uint16_t chipset, > info->optLevel = 3; > #endif > > - info->bin.smemSize = prog->cp.smem_size; > info->io.genUserClip = prog->vp.num_ucps; > info->io.auxCBSlot = 15; > info->io.msInfoCBSlot = 15; > @@ -644,7 +643,6 @@ nvc0_program_translate(struct nvc0_program *prog, > uint16_t chipset, > prog->relocs = info->bin.relocData; > prog->fixups = info->bin.fixupData; > prog->num_gprs = MAX2(4, (info->bin.maxGPR + 1)); > - prog->cp.smem_size = info->bin.smemSize; > prog->num_barriers = info->numBarriers; > > prog->vp.need_vertex_id = info->io.vertexId < PIPE_MAX_SHADER_INPUTS; > @@ -710,7 +708,7 @@ nvc0_program_translate(struct nvc0_program *prog, > uint16_t chipset, > > pipe_debug_message(debug, SHADER_INFO, > "type: %d, local: %d, shared: %d, gpr: %d, inst: %d, > bytes: %d", > - prog->type, info->bin.tlsSpace, info->bin.smemSize, > + prog->type, info->bin.tlsSpace, prog->cp.smem_size, > prog->num_gprs, info->bin.instructions, > info->bin.codeSize); > > -- > 2.24.1 >
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