Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
---
.../panfrost/midgard/midgard_compile.c | 97 +++++++++----------
1 file changed, 48 insertions(+), 49 deletions(-)
diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c
b/src/gallium/drivers/panfrost/midgard/midgard_compile.c
index 951457e2752..f7d28446603 100644
--- a/src/gallium/drivers/panfrost/midgard/midgard_compile.c
+++ b/src/gallium/drivers/panfrost/midgard/midgard_compile.c
@@ -1441,7 +1441,27 @@ emit_texop_native(compiler_context *ctx, nir_tex_instr
*instr,
int texture_index = instr->texture_index;
int sampler_index = texture_index;
- unsigned position_swizzle = 0;
+ /* No helper to build texture words -- we do it all here */
+ midgard_instruction ins = {
+ .type = TAG_TEXTURE_4,
+ .texture = {
+ .op = midgard_texop,
+ .format = midgard_tex_format(instr->sampler_dim),
+ .texture_handle = texture_index,
+ .sampler_handle = sampler_index,
+
+ /* TODO: Regalloc it in */
+ .swizzle = SWIZZLE_XYZW,
+ .mask = 0xF,
+
+ /* TODO: half */
+ .in_reg_full = 1,
+ .out_full = 1,
+
+ /* Always 1 */
+ .unknown7 = 1,
+ }
+ };
for (unsigned i = 0; i < instr->num_srcs; ++i) {
int reg = SSA_FIXED_REGISTER(REGISTER_TEXTURE_BASE + in_reg);
@@ -1468,9 +1488,9 @@ emit_texop_native(compiler_context *ctx, nir_tex_instr
*instr,
st.load_store.swizzle = alu_src.swizzle;
emit_mir_instruction(ctx, st);
- position_swizzle = swizzle_of(2);
+ ins.texture.in_reg_swizzle = swizzle_of(2);
} else {
- position_swizzle = alu_src.swizzle =
swizzle_of(nr_comp);
+ ins.texture.in_reg_swizzle = alu_src.swizzle =
swizzle_of(nr_comp);
midgard_instruction ins = v_mov(index,
alu_src, reg);
ins.alu.mask =
expand_writemask(mask_of(nr_comp));
@@ -1481,7 +1501,7 @@ emit_texop_native(compiler_context *ctx, nir_tex_instr
*instr,
* array */
if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D)
- position_swizzle = SWIZZLE_XYXZ;
+ ins.texture.in_reg_swizzle =
SWIZZLE_XYXZ;
}
break;
@@ -1489,14 +1509,36 @@ emit_texop_native(compiler_context *ctx, nir_tex_instr
*instr,
case nir_tex_src_bias:
case nir_tex_src_lod: {
- /* To keep RA simple, we put the bias/LOD into the w
- * component of the input source, which is otherwise
in xy */
+ /* Try as a constant if we can */
+
+ if (pan_attach_constant_bias(ctx, instr->src[i].src,
&ins.texture))
+ break;
+
+ /* Otherwise we use a register. To keep RA simple, we
+ * put the bias/LOD into the w component of the input
+ * source, which is otherwise in xy */
alu_src.swizzle = SWIZZLE_XXXX;
midgard_instruction ins = v_mov(index, alu_src, reg);
ins.alu.mask = expand_writemask(1 << COMPONENT_W);
emit_mir_instruction(ctx, ins);
+
+ ins.texture.lod_register = true;
+
+ midgard_tex_register_select sel = {
+ .select = in_reg,
+ .full = 1,
+
+ /* w */
+ .component_lo = 1,
+ .component_hi = 1
+ };
+
+ uint8_t packed;
+ memcpy(&packed, &sel, sizeof(packed));
+ ins.texture.bias = packed;
+
break;
};
@@ -1505,53 +1547,10 @@ emit_texop_native(compiler_context *ctx, nir_tex_instr
*instr,
}
}
- /* No helper to build texture words -- we do it all here */
- midgard_instruction ins = {
- .type = TAG_TEXTURE_4,
- .texture = {
- .op = midgard_texop,
- .format = midgard_tex_format(instr->sampler_dim),
- .texture_handle = texture_index,
- .sampler_handle = sampler_index,
-
- /* TODO: Regalloc it in */
- .swizzle = SWIZZLE_XYZW,
- .mask = 0xF,
-
- /* TODO: half */
- .in_reg_full = 1,
- .in_reg_swizzle = position_swizzle,
- .out_full = 1,
-
- /* Always 1 */
- .unknown7 = 1,
- }
- };
-
/* Set registers to read and write from the same place */
ins.texture.in_reg_select = in_reg;
ins.texture.out_reg_select = out_reg;
- /* Setup bias/LOD if necessary. Only register mode support right now.
- * TODO: Immediate mode for performance gains */
-
- if (instr->op == nir_texop_txb || instr->op == nir_texop_txl) {
- ins.texture.lod_register = true;
-
- midgard_tex_register_select sel = {
- .select = in_reg,
- .full = 1,
-
- /* w */
- .component_lo = 1,
- .component_hi = 1
- };
-
- uint8_t packed;
- memcpy(&packed, &sel, sizeof(packed));
- ins.texture.bias = packed;
- }
-
emit_mir_instruction(ctx, ins);
/* Simultaneously alias the destination and emit a move for it. The
move will be eliminated if possible */
--
2.20.1
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