These snippets of integer assembly are injected for various purposes
(where we cannot express it yet in pure NIR), but we need to make sure
they are int modded too.
Signed-off-by: Alyssa Rosenzweig <aly...@rosenzweig.io>
---
src/gallium/drivers/panfrost/midgard/midgard_compile.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c
b/src/gallium/drivers/panfrost/midgard/midgard_compile.c
index ab1d259e0d4..8bb9e729d71 100644
--- a/src/gallium/drivers/panfrost/midgard/midgard_compile.c
+++ b/src/gallium/drivers/panfrost/midgard/midgard_compile.c
@@ -546,6 +546,7 @@ emit_condition(compiler_context *ctx, nir_src *src, bool
for_branch, unsigned co
},
.alu = {
.op = midgard_alu_op_iand,
+ .outmod = midgard_outmod_int,
.reg_mode = midgard_reg_mode_32,
.dest_override = midgard_dest_override_none,
.mask = (0x3 << 6), /* w */
@@ -584,6 +585,7 @@ emit_condition_mixed(compiler_context *ctx, nir_alu_src
*src, unsigned nr_comp)
},
.alu = {
.op = midgard_alu_op_iand,
+ .outmod = midgard_outmod_int,
.reg_mode = midgard_reg_mode_32,
.dest_override = midgard_dest_override_none,
.mask = expand_writemask((1 << nr_comp) - 1),
@@ -614,6 +616,7 @@ emit_indirect_offset(compiler_context *ctx, nir_src *src)
},
.alu = {
.op = midgard_alu_op_imov,
+ .outmod = midgard_outmod_int,
.reg_mode = midgard_reg_mode_32,
.dest_override = midgard_dest_override_none,
.mask = (0x3 << 6), /* w */
@@ -2716,6 +2719,7 @@ emit_blend_epilogue(compiler_context *ctx)
.op = midgard_alu_op_imov,
.reg_mode = midgard_reg_mode_8,
.dest_override = midgard_dest_override_none,
+ .outmod = midgard_outmod_int,
.mask = 0xFF,
.src1 = vector_alu_srco_unsigned(blank_alu_src),
.src2 = vector_alu_srco_unsigned(blank_alu_src),
--
2.20.1
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