[Mesa-dev] [PATCH 1/2] radeonsi: use new atomic LLVM helpers

[Marek Olšák]

From: Marek Olšák <marek.ol...@amd.com>

This depends on "ac,ac/nir: use a better sync scope for shared atomics"
---
 src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c 
b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
index eb90bfb10ff..5e540fc5098 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
@@ -776,38 +776,36 @@ static void store_emit(
                emit_data->output[emit_data->chan] =
                        ac_build_image_opcode(&ctx->ac, &args);
        }
 }
 
 static void atomic_emit_memory(struct si_shader_context *ctx,
                                struct lp_build_emit_data *emit_data) {
        LLVMBuilderRef builder = ctx->ac.builder;
        const struct tgsi_full_instruction * inst = emit_data->inst;
        LLVMValueRef ptr, result, arg;
+       const char *sync_scope = HAVE_LLVM >= 0x0900 ? "workgroup-one-as" : 
"workgroup";
 
        ptr = get_memory_ptr(ctx, inst, ctx->i32, 1);
 
        arg = lp_build_emit_fetch(&ctx->bld_base, inst, 2, 0);
        arg = ac_to_integer(&ctx->ac, arg);
 
        if (inst->Instruction.Opcode == TGSI_OPCODE_ATOMCAS) {
                LLVMValueRef new_data;
                new_data = lp_build_emit_fetch(&ctx->bld_base,
                                               inst, 3, 0);
 
                new_data = ac_to_integer(&ctx->ac, new_data);
 
-               result = LLVMBuildAtomicCmpXchg(builder, ptr, arg, new_data,
-                                      LLVMAtomicOrderingSequentiallyConsistent,
-                                      LLVMAtomicOrderingSequentiallyConsistent,
-                                      false);
-
+               result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, arg, new_data,
+                                                 sync_scope);
                result = LLVMBuildExtractValue(builder, result, 0, "");
        } else {
                LLVMAtomicRMWBinOp op;
 
                switch(inst->Instruction.Opcode) {
                        case TGSI_OPCODE_ATOMUADD:
                                op = LLVMAtomicRMWBinOpAdd;
                                break;
                        case TGSI_OPCODE_ATOMXCHG:
                                op = LLVMAtomicRMWBinOpXchg;
@@ -830,23 +828,21 @@ static void atomic_emit_memory(struct si_shader_context 
*ctx,
                        case TGSI_OPCODE_ATOMIMIN:
                                op = LLVMAtomicRMWBinOpMin;
                                break;
                        case TGSI_OPCODE_ATOMIMAX:
                                op = LLVMAtomicRMWBinOpMax;
                                break;
                        default:
                                unreachable("unknown atomic opcode");
                }
 
-               result = LLVMBuildAtomicRMW(builder, op, ptr, arg,
-                                      LLVMAtomicOrderingSequentiallyConsistent,
-                                      false);
+               result = ac_build_atomic_rmw(&ctx->ac, op, ptr, arg, 
sync_scope);
        }
        emit_data->output[emit_data->chan] =
                LLVMBuildBitCast(builder, result, ctx->f32, "");
 }
 
 static void atomic_emit(
                const struct lp_build_tgsi_action *action,
                struct lp_build_tgsi_context *bld_base,
                struct lp_build_emit_data *emit_data)
 {
-- 
2.17.1

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