On 05/08/2012 11:40 AM, Olivier Galibert wrote:
TGSI doesn't need an opcode, since registers are untyped (but beware
once doubles come into the scene). Mesa IR doesn't handle native
integers, so trying to handle them there is worthless, the case
entries are only added for warning reasons.
It was only tested with softpipe, since llvmpipe doesn't support glsl
1.3 yet.
Signed-off-by: Olivier Galibert<galib...@pobox.com>
---
src/mesa/program/ir_to_mesa.cpp | 5 +++++
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 6 ++++++
2 files changed, 11 insertions(+)
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index 840648e..c7f2ec0 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -1407,6 +1407,11 @@ ir_to_mesa_visitor::visit(ir_expression *ir)
emit(ir, OPCODE_SNE, result_dst,
op[0], src_reg_for_float(0.0));
break;
+ case ir_unop_bitcast_f2i: // Ignore these 4, they can't happen here anyway
+ case ir_unop_bitcast_f2u:
+ case ir_unop_bitcast_i2f:
+ case ir_unop_bitcast_u2f:
+ break;
This should be fine, but it might be better to have an
assert(!"Should not get here.");
like in the ir_quadop_vector case.
case ir_unop_trunc:
emit(ir, OPCODE_TRUNC, result_dst, op[0]);
break;
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 9e68deb..2688276 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -1762,6 +1762,12 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir)
else
emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
break;
+ case ir_unop_bitcast_f2i:
+ case ir_unop_bitcast_f2u:
+ case ir_unop_bitcast_i2f:
+ case ir_unop_bitcast_u2f:
+ result_src = op[0];
+ break;
case ir_unop_f2b:
emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
break;
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