Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net> On Tue, Jan 15, 2019 at 7:54 AM Iago Toral Quiroga <ito...@igalia.com> wrote:
> There are some hardware restrictions that brw_nir_lower_conversions should > have taken care of before we get here. > > v2: > - rebased on top of regioning lowering pass > > Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com> (v1) > --- > src/intel/compiler/brw_fs_nir.cpp | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/src/intel/compiler/brw_fs_nir.cpp > b/src/intel/compiler/brw_fs_nir.cpp > index e1d0e318b35..d742f55a957 100644 > --- a/src/intel/compiler/brw_fs_nir.cpp > +++ b/src/intel/compiler/brw_fs_nir.cpp > @@ -784,6 +784,9 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, > nir_alu_instr *instr) > */ > > case nir_op_f2f16: > + case nir_op_i2f16: > + case nir_op_u2f16: > + assert(type_sz(op[0].type) < 8); /* brw_nir_lower_conversions */ > inst = bld.MOV(result, op[0]); > inst->saturate = instr->dest.saturate; > break; > @@ -821,8 +824,6 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, > nir_alu_instr *instr) > case nir_op_u2u32: > case nir_op_i2i16: > case nir_op_u2u16: > - case nir_op_i2f16: > - case nir_op_u2f16: > case nir_op_i2i8: > case nir_op_u2u8: > inst = bld.MOV(result, op[0]); > -- > 2.17.1 > > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev >
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