Still some bits missing (I think from 4/5):
NVC0LoweringPass::handleSurfaceOpGM107(TexInstruction *su)
{
processSurfaceCoordsGM107(su);
if (su->op == OP_SULDP) {
convertSurfaceFormat(su);
insertOOBSurfaceOpResult(su);
}
and convertSurfaceFormat will unconditionally flip SULDP into SULDB.
Should that call just get dropped?
-ilia
On Wed, Jan 16, 2019 at 6:20 PM Rhys Perry <pendingchao...@gmail.com> wrote:
>
> v3: rebase
>
> Signed-off-by: Rhys Perry <pendingchao...@gmail.com>
> ---
> src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 3 +--
> src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 3 ++-
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> index 295497be2f..6c134962b4 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> @@ -2414,12 +2414,11 @@
> NVC0LoweringPass::processSurfaceCoordsGM107(TexInstruction *su)
> bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE),
> TYPE_U32, bld.mkImm(0),
> loadSuInfo32(ind, slot, NVC0_SU_INFO_ADDR,
> su->tex.bindless));
> - if (su->op != OP_SUSTP && su->tex.format) {
> + if (su->op != OP_SUSTP && su->tex.format && su->tex.format->components >
> 0) {
> const TexInstruction::ImgFormatDesc *format = su->tex.format;
> int blockwidth = format->bits[0] + format->bits[1] +
> format->bits[2] + format->bits[3];
>
> - assert(format->components != 0);
> // make sure that the format doesn't mismatch when it's not FMT_NONE
> bld.mkCmp(OP_SET_OR, CC_NE, TYPE_U32, pred->getDef(0),
> TYPE_U32, bld.loadImm(NULL, blockwidth / 8),
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> index b7cf2cd2e4..c47502cae1 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> @@ -288,6 +288,8 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum
> pipe_cap param)
> return class_3d >= GM200_3D_CLASS;
> case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
> return class_3d >= GP100_3D_CLASS;
> + case PIPE_CAP_IMAGE_LOAD_FORMATTED:
> + return class_3d >= GM107_3D_CLASS;
>
> /* unsupported caps */
> case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
> @@ -334,7 +336,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum
> pipe_cap param)
> case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
> case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
> case PIPE_CAP_SURFACE_SAMPLE_COUNT:
> - case PIPE_CAP_IMAGE_LOAD_FORMATTED:
> return 0;
>
> case PIPE_CAP_VENDOR_ID:
> --
> 2.20.1
>
> _______________________________________________
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
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