---
src/gallium/drivers/i915/i915_fpc_translate.c | 16 ++++++++++++++++
src/gallium/drivers/nv30/nvfx_fragprog.c | 4 ++++
src/gallium/drivers/nv30/nvfx_vertprog.c | 4 ++++
3 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/i915/i915_fpc_translate.c
b/src/gallium/drivers/i915/i915_fpc_translate.c
index 94c0c69..def9a03 100644
--- a/src/gallium/drivers/i915/i915_fpc_translate.c
+++ b/src/gallium/drivers/i915/i915_fpc_translate.c
@@ -512,6 +512,22 @@ i915_translate_instruction(struct i915_fp_compile *p,
emit_simple_arith(p, inst, A0_ADD, 2, fs);
break;
+ case TGSI_OPCODE_CEIL:
+ src0 = src_vector(p, &inst->Src[0], fs);
+ tmp = i915_get_utemp(p);
+ flags = get_result_flags(inst);
+ i915_emit_arith(p,
+ A0_FLR,
+ tmp,
+ flags & A0_DEST_CHANNEL_ALL, 0,
+ negate(src0, 1, 1, 1, 1), 0, 0);
+ i915_emit_arith(p,
+ A0_MOV,
+ get_result_vector(p, &inst->Dst[0]),
+ flags, 0,
+ negate(tmp, 1, 1, 1, 1), 0, 0);
+ break;
+
case TGSI_OPCODE_CMP:
src0 = src_vector(p, &inst->Src[0], fs);
src1 = src_vector(p, &inst->Src[1], fs);
diff --git a/src/gallium/drivers/nv30/nvfx_fragprog.c
b/src/gallium/drivers/nv30/nvfx_fragprog.c
index e562b45..b057c98 100644
--- a/src/gallium/drivers/nv30/nvfx_fragprog.c
+++ b/src/gallium/drivers/nv30/nvfx_fragprog.c
@@ -535,6 +535,10 @@ nvfx_fragprog_parse_instruction(struct nv30_context* nvfx,
struct nvfx_fpc *fpc,
case TGSI_OPCODE_ADD:
nvfx_fp_emit(fpc, arith(sat, ADD, dst, mask, src[0], src[1], none));
break;
+ case TGSI_OPCODE_CEIL:
+ nvfx_fp_emit(fpc, arith(0, FLR, tmp.reg, mask, neg(src[0]), none, none));
+ nvfx_fp_emit(fpc, arith(sat, MOV, dst, mask, neg(tmp), none, none));
+ break;
case TGSI_OPCODE_CMP:
insn = arith(0, MOV, none.reg, mask, src[0], none, none);
insn.cc_update = 1;
diff --git a/src/gallium/drivers/nv30/nvfx_vertprog.c
b/src/gallium/drivers/nv30/nvfx_vertprog.c
index d7eb9fb..967679a 100644
--- a/src/gallium/drivers/nv30/nvfx_vertprog.c
+++ b/src/gallium/drivers/nv30/nvfx_vertprog.c
@@ -550,6 +550,10 @@ nvfx_vertprog_parse_instruction(struct nv30_context *nv30,
struct nvfx_vpc *vpc,
case TGSI_OPCODE_ARL:
nvfx_vp_emit(vpc, arith(0, VEC, ARL, dst, mask, src[0], none, none));
break;
+ case TGSI_OPCODE_CEIL:
+ nvfx_vp_emit(vpc, arith(0, VEC, FLR, tmp.reg, mask, neg(src[0]), none,
none));
+ nvfx_vp_emit(vpc, arith(sat, VEC, MOV, dst, mask, neg(tmp), none, none));
+ break;
case TGSI_OPCODE_CMP:
insn = arith(0, VEC, MOV, none.reg, mask, src[0], none, none);
insn.cc_update = 1;
--
1.7.3.4
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