On Tue, 24 Apr 2012 17:30:32 +0200, Gwenole Beauchesne <gb.de...@gmail.com> wrote: > Hi, > > This patch series implements the proposed DRI image extension v4 > changes to Intel GenX. To be honest, I have not tested the picture > structure patch, as I directly adapted it from the VA driver, where > interlaced surfaces are correctly handled already. > > I simplified the hashing stuff to the minimal useful set. i.e. store > up to 3 intel_regions into an hash entry. No more variable array of > regions.
So, I really don't like this idea. Is there some requirement that your 3 planes actually be stored in a single BO? It seems to me that if you could have 3 separate BOs, making use of them on the GL side is way easier.
pgpPpcgGpeynh.pgp
Description: PGP signature
_______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev