On Tue, Nov 6, 2018, 2:47 AM Samuel Pitoiset <samuel.pitoi...@gmail.com wrote:
> > > On 11/5/18 10:52 PM, Marek Olšák wrote: > > On Fri, Nov 2, 2018 at 5:21 AM Samuel Pitoiset > > <samuel.pitoi...@gmail.com <mailto:samuel.pitoi...@gmail.com>> wrote: > > > > User are encouraged to switch to LLVM 7.0 released in September 2018. > > > > Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com > > <mailto:samuel.pitoi...@gmail.com>> > > --- > > configure.ac <http://configure.ac> > > | 4 +- > > meson.build | 2 +- > > src/amd/common/ac_llvm_build.c | 270 > +----------------- > > src/amd/common/ac_llvm_build.h | 8 +- > > src/amd/common/ac_llvm_helper.cpp | 7 - > > src/amd/common/ac_llvm_util.c | 19 +- > > src/amd/common/ac_nir_to_llvm.c | 24 +- > > src/amd/vulkan/radv_cmd_buffer.c | 15 +- > > src/amd/vulkan/radv_device.c | 4 +- > > src/amd/vulkan/radv_extensions.py | 2 +- > > src/amd/vulkan/radv_nir_to_llvm.c | 13 +- > > src/amd/vulkan/radv_private.h | 2 +- > > src/gallium/drivers/radeonsi/si_descriptors.c | 49 +--- > > src/gallium/drivers/radeonsi/si_get.c | 9 - > > src/gallium/drivers/radeonsi/si_shader.c | 92 +----- > > src/gallium/drivers/radeonsi/si_shader.h | 27 -- > > .../drivers/radeonsi/si_shader_tgsi_alu.c | 47 ++- > > .../drivers/radeonsi/si_state_shaders.c | 7 +- > > 18 files changed, 86 insertions(+), 515 deletions(-) > > > > diff --git a/configure.ac <http://configure.ac> b/configure.ac > > <http://configure.ac> > > index d782f56205..fe63044293 100644 > > --- a/configure.ac <http://configure.ac> > > +++ b/configure.ac <http://configure.ac> > > @@ -107,8 +107,8 @@ dnl LLVM versions > > LLVM_REQUIRED_GALLIUM=3.3.0 > > LLVM_REQUIRED_OPENCL=3.9.0 > > LLVM_REQUIRED_R600=3.9.0 > > -LLVM_REQUIRED_RADEONSI=6.0.0 > > -LLVM_REQUIRED_RADV=6.0.0 > > +LLVM_REQUIRED_RADEONSI=7.0.0 > > +LLVM_REQUIRED_RADV=7.0.0 > > LLVM_REQUIRED_SWR=6.0.0 > > > > dnl Check for progs > > diff --git a/meson.build b/meson.build > > index 18667988ba..22a9c7bd9a 100644 > > --- a/meson.build > > +++ b/meson.build > > @@ -1176,7 +1176,7 @@ if with_gallium_opencl > > endif > > > > if with_amd_vk or with_gallium_radeonsi > > - _llvm_version = '>= 6.0.0' > > + _llvm_version = '>= 7.0.0' > > elif with_gallium_swr > > _llvm_version = '>= 6.0.0' > > elif with_gallium_opencl or with_gallium_r600 > > diff --git a/src/amd/common/ac_llvm_build.c > > b/src/amd/common/ac_llvm_build.c > > index 1392ec0f23..108e37a3e7 100644 > > --- a/src/amd/common/ac_llvm_build.c > > +++ b/src/amd/common/ac_llvm_build.c > > @@ -75,7 +75,7 @@ ac_llvm_context_init(struct ac_llvm_context *ctx, > > ctx->i16 = LLVMIntTypeInContext(ctx->context, 16); > > ctx->i32 = LLVMIntTypeInContext(ctx->context, 32); > > ctx->i64 = LLVMIntTypeInContext(ctx->context, 64); > > - ctx->intptr = HAVE_32BIT_POINTERS ? ctx->i32 : ctx->i64; > > + ctx->intptr = ctx->i32; > > ctx->f16 = LLVMHalfTypeInContext(ctx->context); > > ctx->f32 = LLVMFloatTypeInContext(ctx->context); > > ctx->f64 = LLVMDoubleTypeInContext(ctx->context); > > @@ -1342,99 +1342,28 @@ ac_build_ddxy(struct ac_llvm_context *ctx, > > int idx, > > LLVMValueRef val) > > { > > + unsigned tl_lanes[4], trbl_lanes[4]; > > LLVMValueRef tl, trbl, args[2]; > > LLVMValueRef result; > > > > - if (HAVE_LLVM >= 0x0700) { > > - unsigned tl_lanes[4], trbl_lanes[4]; > > - > > - for (unsigned i = 0; i < 4; ++i) { > > - tl_lanes[i] = i & mask; > > - trbl_lanes[i] = (i & mask) + idx; > > - } > > - > > - tl = ac_build_quad_swizzle(ctx, val, > > - tl_lanes[0], tl_lanes[1], > > - tl_lanes[2], tl_lanes[3]); > > - trbl = ac_build_quad_swizzle(ctx, val, > > - trbl_lanes[0], > > trbl_lanes[1], > > - trbl_lanes[2], > > trbl_lanes[3]); > > - } else if (ctx->chip_class >= VI) { > > - LLVMValueRef thread_id, tl_tid, trbl_tid; > > - thread_id = ac_get_thread_id(ctx); > > - > > - tl_tid = LLVMBuildAnd(ctx->builder, thread_id, > > - LLVMConstInt(ctx->i32, mask, > > false), ""); > > - > > - trbl_tid = LLVMBuildAdd(ctx->builder, tl_tid, > > - LLVMConstInt(ctx->i32, idx, > > false), ""); > > - > > - args[0] = LLVMBuildMul(ctx->builder, tl_tid, > > - LLVMConstInt(ctx->i32, 4, > > false), ""); > > - args[1] = val; > > - tl = ac_build_intrinsic(ctx, > > - "llvm.amdgcn.ds.bpermute", > > ctx->i32, > > - args, 2, > > - AC_FUNC_ATTR_READNONE | > > - AC_FUNC_ATTR_CONVERGENT); > > - > > - args[0] = LLVMBuildMul(ctx->builder, trbl_tid, > > - LLVMConstInt(ctx->i32, 4, > > false), ""); > > - trbl = ac_build_intrinsic(ctx, > > - "llvm.amdgcn.ds.bpermute", > > ctx->i32, > > - args, 2, > > - AC_FUNC_ATTR_READNONE | > > - AC_FUNC_ATTR_CONVERGENT); > > - } else { > > - uint32_t masks[2] = {}; > > - > > - switch (mask) { > > - case AC_TID_MASK_TOP_LEFT: > > - masks[0] = 0x8000; > > - if (idx == 1) > > - masks[1] = 0x8055; > > - else > > - masks[1] = 0x80aa; > > - > > - break; > > - case AC_TID_MASK_TOP: > > - masks[0] = 0x8044; > > - masks[1] = 0x80ee; > > - break; > > - case AC_TID_MASK_LEFT: > > - masks[0] = 0x80a0; > > - masks[1] = 0x80f5; > > - break; > > - default: > > - assert(0); > > - } > > - > > - args[0] = val; > > - args[1] = LLVMConstInt(ctx->i32, masks[0], false); > > - > > - tl = ac_build_intrinsic(ctx, > > - "llvm.amdgcn.ds.swizzle", > > ctx->i32, > > - args, 2, > > - AC_FUNC_ATTR_READNONE | > > - AC_FUNC_ATTR_CONVERGENT); > > - > > - args[1] = LLVMConstInt(ctx->i32, masks[1], false); > > - trbl = ac_build_intrinsic(ctx, > > - "llvm.amdgcn.ds.swizzle", > > ctx->i32, > > - args, 2, > > - AC_FUNC_ATTR_READNONE | > > - AC_FUNC_ATTR_CONVERGENT); > > + for (unsigned i = 0; i < 4; ++i) { > > + tl_lanes[i] = i & mask; > > + trbl_lanes[i] = (i & mask) + idx; > > } > > > > + tl = ac_build_quad_swizzle(ctx, val, > > + tl_lanes[0], tl_lanes[1], > > + tl_lanes[2], tl_lanes[3]); > > + trbl = ac_build_quad_swizzle(ctx, val, > > + trbl_lanes[0], trbl_lanes[1], > > + trbl_lanes[2], trbl_lanes[3]); > > + > > tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, ""); > > trbl = LLVMBuildBitCast(ctx->builder, trbl, ctx->f32, ""); > > result = LLVMBuildFSub(ctx->builder, trbl, tl, ""); > > > > - if (HAVE_LLVM >= 0x0700) { > > - result = ac_build_intrinsic(ctx, > > - "llvm.amdgcn.wqm.f32", ctx->f32, > > - &result, 1, 0); > > - } > > + result = ac_build_intrinsic(ctx, "llvm.amdgcn.wqm.f32", > > ctx->f32, > > + &result, 1, 0); > > > > return result; > > } > > @@ -1679,171 +1608,6 @@ static const char *get_atomic_name(enum > > ac_atomic_op op) > > unreachable("bad atomic op"); > > } > > > > -/* LLVM 6 and older */ > > -static LLVMValueRef ac_build_image_opcode_llvm6(struct > > ac_llvm_context *ctx, > > - struct ac_image_args > *a) > > -{ > > - LLVMValueRef args[16]; > > - LLVMTypeRef retty = ctx->v4f32; > > - const char *name = NULL; > > - const char *atomic_subop = ""; > > - char intr_name[128], coords_type[64]; > > - > > - bool sample = a->opcode == ac_image_sample || > > - a->opcode == ac_image_gather4 || > > - a->opcode == ac_image_get_lod; > > - bool atomic = a->opcode == ac_image_atomic || > > - a->opcode == ac_image_atomic_cmpswap; > > - bool da = a->dim == ac_image_cube || > > - a->dim == ac_image_1darray || > > - a->dim == ac_image_2darray || > > - a->dim == ac_image_2darraymsaa; > > - if (a->opcode == ac_image_get_lod) > > - da = false; > > - > > - unsigned num_coords = > > - a->opcode != ac_image_get_resinfo ? > > ac_num_coords(a->dim) : 0; > > - LLVMValueRef addr; > > - unsigned num_addr = 0; > > - > > - if (a->opcode == ac_image_get_lod) { > > - switch (a->dim) { > > - case ac_image_1darray: > > - num_coords = 1; > > - break; > > - case ac_image_2darray: > > - case ac_image_cube: > > - num_coords = 2; > > - break; > > - default: > > - break; > > - } > > - } > > - > > - if (a->offset) > > - args[num_addr++] = ac_to_integer(ctx, a->offset); > > - if (a->bias) > > - args[num_addr++] = ac_to_integer(ctx, a->bias); > > - if (a->compare) > > - args[num_addr++] = ac_to_integer(ctx, a->compare); > > - if (a->derivs[0]) { > > - unsigned num_derivs = ac_num_derivs(a->dim); > > - for (unsigned i = 0; i < num_derivs; ++i) > > - args[num_addr++] = ac_to_integer(ctx, > > a->derivs[i]); > > - } > > - for (unsigned i = 0; i < num_coords; ++i) > > - args[num_addr++] = ac_to_integer(ctx, a->coords[i]); > > - if (a->lod) > > - args[num_addr++] = ac_to_integer(ctx, a->lod); > > - > > - unsigned pad_goal = util_next_power_of_two(num_addr); > > - while (num_addr < pad_goal) > > - args[num_addr++] = LLVMGetUndef(ctx->i32); > > - > > - addr = ac_build_gather_values(ctx, args, num_addr); > > - > > - unsigned num_args = 0; > > - if (atomic || a->opcode == ac_image_store || a->opcode == > > ac_image_store_mip) { > > - args[num_args++] = a->data[0]; > > - if (a->opcode == ac_image_atomic_cmpswap) > > - args[num_args++] = a->data[1]; > > - } > > - > > - unsigned coords_arg = num_args; > > - if (sample) > > - args[num_args++] = ac_to_float(ctx, addr); > > - else > > - args[num_args++] = ac_to_integer(ctx, addr); > > - > > - args[num_args++] = a->resource; > > - if (sample) > > - args[num_args++] = a->sampler; > > - if (!atomic) { > > - args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, > 0); > > - if (sample) > > - args[num_args++] = LLVMConstInt(ctx->i1, > > a->unorm, 0); > > - args[num_args++] = a->cache_policy & ac_glc ? > > ctx->i1true : ctx->i1false; > > - args[num_args++] = a->cache_policy & ac_slc ? > > ctx->i1true : ctx->i1false; > > - args[num_args++] = ctx->i1false; /* lwe */ > > - args[num_args++] = LLVMConstInt(ctx->i1, da, 0); > > - } else { > > - args[num_args++] = ctx->i1false; /* r128 */ > > - args[num_args++] = LLVMConstInt(ctx->i1, da, 0); > > - args[num_args++] = a->cache_policy & ac_slc ? > > ctx->i1true : ctx->i1false; > > - } > > - > > - switch (a->opcode) { > > - case ac_image_sample: > > - name = "llvm.amdgcn.image.sample"; > > - break; > > - case ac_image_gather4: > > - name = "llvm.amdgcn.image.gather4"; > > - break; > > - case ac_image_load: > > - name = "llvm.amdgcn.image.load"; > > - break; > > - case ac_image_load_mip: > > - name = "llvm.amdgcn.image.load.mip"; > > - break; > > - case ac_image_store: > > - name = "llvm.amdgcn.image.store"; > > - retty = ctx->voidt; > > - break; > > - case ac_image_store_mip: > > - name = "llvm.amdgcn.image.store.mip"; > > - retty = ctx->voidt; > > - break; > > - case ac_image_atomic: > > - case ac_image_atomic_cmpswap: > > - name = "llvm.amdgcn.image.atomic."; > > - retty = ctx->i32; > > - if (a->opcode == ac_image_atomic_cmpswap) { > > - atomic_subop = "cmpswap"; > > - } else { > > - atomic_subop = get_atomic_name(a->atomic); > > - } > > - break; > > - case ac_image_get_lod: > > - name = "llvm.amdgcn.image.getlod"; > > - break; > > - case ac_image_get_resinfo: > > - name = "llvm.amdgcn.image.getresinfo"; > > - break; > > - default: > > - unreachable("invalid image opcode"); > > - } > > - > > - ac_build_type_name_for_intr(LLVMTypeOf(args[coords_arg]), > > coords_type, > > - sizeof(coords_type)); > > - > > - if (atomic) { > > - snprintf(intr_name, sizeof(intr_name), > > "llvm.amdgcn.image.atomic.%s.%s", > > - atomic_subop, coords_type); > > - } else { > > - bool lod_suffix = > > - a->lod && (a->opcode == ac_image_sample || > > a->opcode == ac_image_gather4); > > - > > - snprintf(intr_name, sizeof(intr_name), > > "%s%s%s%s.v4f32.%s.v8i32", > > - name, > > - a->compare ? ".c" : "", > > - a->bias ? ".b" : > > - lod_suffix ? ".l" : > > - a->derivs[0] ? ".d" : > > - a->level_zero ? ".lz" : "", > > - a->offset ? ".o" : "", > > - coords_type); > > - } > > - > > - LLVMValueRef result = > > - ac_build_intrinsic(ctx, intr_name, retty, args, > > num_args, > > - a->attributes); > > - if (!sample && retty == ctx->v4f32) { > > - result = LLVMBuildBitCast(ctx->builder, result, > > - ctx->v4i32, ""); > > - } > > - return result; > > -} > > - > > LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx, > > struct ac_image_args *a) > > { > > @@ -1868,9 +1632,6 @@ LLVMValueRef ac_build_image_opcode(struct > > ac_llvm_context *ctx, > > (a->level_zero ? 1 : 0) + > > (a->derivs[0] ? 1 : 0) <= 1); > > > > - if (HAVE_LLVM < 0x0700) > > - return ac_build_image_opcode_llvm6(ctx, a); > > - > > if (a->opcode == ac_image_get_lod) { > > switch (dim) { > > case ac_image_1darray: > > @@ -2659,9 +2420,6 @@ LLVMTypeRef > > ac_array_in_const_addr_space(LLVMTypeRef elem_type) > > > > LLVMTypeRef ac_array_in_const32_addr_space(LLVMTypeRef elem_type) > > { > > - if (!HAVE_32BIT_POINTERS) > > - return ac_array_in_const_addr_space(elem_type); > > - > > return LLVMPointerType(LLVMArrayType(elem_type, 0), > > AC_ADDR_SPACE_CONST_32BIT); > > } > > diff --git a/src/amd/common/ac_llvm_build.h > > b/src/amd/common/ac_llvm_build.h > > index 1275e4fb69..26399b7832 100644 > > --- a/src/amd/common/ac_llvm_build.h > > +++ b/src/amd/common/ac_llvm_build.h > > @@ -34,14 +34,12 @@ > > extern "C" { > > #endif > > > > -#define HAVE_32BIT_POINTERS (HAVE_LLVM >= 0x0700) > > - > > enum { > > - AC_ADDR_SPACE_FLAT = HAVE_LLVM >= 0x0700 ? 0 : 4, /* Slower > > than global. */ > > + AC_ADDR_SPACE_FLAT = 0, /* Slower than global. */ > > AC_ADDR_SPACE_GLOBAL = 1, > > - AC_ADDR_SPACE_GDS = HAVE_LLVM >= 0x0700 ? 2 : 5, > > + AC_ADDR_SPACE_GDS = 2, > > AC_ADDR_SPACE_LDS = 3, > > - AC_ADDR_SPACE_CONST = HAVE_LLVM >= 0x0700 ? 4 : 2, /* Global > > allowing SMEM. */ > > + AC_ADDR_SPACE_CONST = 4, /* Global allowing SMEM. */ > > AC_ADDR_SPACE_CONST_32BIT = 6, /* same as CONST, but the > > pointer type has 32 bits */ > > }; > > > > diff --git a/src/amd/common/ac_llvm_helper.cpp > > b/src/amd/common/ac_llvm_helper.cpp > > index e022e12c7f..dcfb800854 100644 > > --- a/src/amd/common/ac_llvm_helper.cpp > > +++ b/src/amd/common/ac_llvm_helper.cpp > > @@ -39,9 +39,6 @@ > > #include <llvm/Transforms/IPO.h> > > > > #include <llvm/IR/LegacyPassManager.h> > > -#if HAVE_LLVM < 0x0700 > > -#include "llvm/Support/raw_ostream.h" > > -#endif > > > > void ac_add_attr_dereferenceable(LLVMValueRef val, uint64_t bytes) > > { > > @@ -132,9 +129,7 @@ struct ac_compiler_passes > > *ac_create_llvm_passes(LLVMTargetMachineRef tm) > > llvm::TargetMachine *TM = > > reinterpret_cast<llvm::TargetMachine*>(tm); > > > > if (TM->addPassesToEmitFile(p->passmgr, p->ostream, > > -#if HAVE_LLVM >= 0x0700 > > nullptr, > > -#endif > > > > llvm::TargetMachine::CGFT_ObjectFile)) { > > fprintf(stderr, "amd: TargetMachine can't emit a > > file of this type!\n"); > > delete p; > > @@ -170,7 +165,5 @@ void > > ac_llvm_add_barrier_noop_pass(LLVMPassManagerRef passmgr) > > > > void ac_enable_global_isel(LLVMTargetMachineRef tm) > > { > > -#if HAVE_LLVM >= 0x0700 > > reinterpret_cast<llvm::TargetMachine*>(tm)->setGlobalISel(true); > > -#endif > > } > > diff --git a/src/amd/common/ac_llvm_util.c > > b/src/amd/common/ac_llvm_util.c > > index 69d9f7b9f3..0c8565f95a 100644 > > --- a/src/amd/common/ac_llvm_util.c > > +++ b/src/amd/common/ac_llvm_util.c > > @@ -30,9 +30,7 @@ > > #include <llvm-c/Support.h> > > #include <llvm-c/Transforms/IPO.h> > > #include <llvm-c/Transforms/Scalar.h> > > -#if HAVE_LLVM >= 0x0700 > > #include <llvm-c/Transforms/Utils.h> > > -#endif > > #include "c11/threads.h" > > #include "gallivm/lp_bld_misc.h" > > #include "util/u_math.h" > > @@ -132,9 +130,9 @@ const char *ac_get_llvm_processor_name(enum > > radeon_family family) > > case CHIP_RAVEN: > > return "gfx902"; > > case CHIP_VEGA12: > > - return HAVE_LLVM >= 0x0700 ? "gfx904" : "gfx902"; > > + return "gfx904"; > > case CHIP_VEGA20: > > - return HAVE_LLVM >= 0x0700 ? "gfx906" : "gfx902"; > > + return "gfx906"; > > case CHIP_RAVEN2: > > return "gfx902"; /* TODO: use gfx909 when it's > > available */ > > default: > > @@ -323,12 +321,10 @@ ac_init_llvm_compiler(struct ac_llvm_compiler > > *compiler, > > goto fail; > > } > > > > - if (okay_to_leak_target_library_info || (HAVE_LLVM >= > 0x0700)) { > > - compiler->target_library_info = > > - ac_create_target_library_info(triple); > > - if (!compiler->target_library_info) > > - goto fail; > > - } > > + compiler->target_library_info = > > + ac_create_target_library_info(triple); > > + if (!compiler->target_library_info) > > + goto fail; > > > > > > You can also remove the "okay_to_leak_target_library_info" parameter. > > Other than that: > > > > Reviewed-by: Marek Olšák <marek.ol...@amd.com <mailto: > marek.ol...@amd.com>> > > Thanks for the review, but should we wait or not then? > Not anymore. Marek > > > > Marek >
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