Hi,
Toni had a working assembler in early 2017, but he had to stop working
on it because nobody reviewed the patches needed for the disassembler.
Maybe his patch series for the disassembly output still has something
useful for your assembler:
* i965 shader disassembly label support:
https://patchwork.freedesktop.org/series/19946/
* i965 shader disassembly formatting changes:
https://patchwork.freedesktop.org/series/19945/
* Always print message descriptor and SFID for SEND instructions:
https://patchwork.freedesktop.org/patch/223750/
?
- Eero
On 10/25/18 2:25 AM, Sagar Ghuge wrote:
While disassembling send(c) instruction print message descriptor as
immediate source operand along with message descriptor. This allows
assembler to read immediate source operand and set bits accordingly.
Signed-off-by: Sagar Ghuge <sagar.gh...@intel.com>
---
src/intel/compiler/brw_disasm.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c
index 6a7e988641..9c6df9e645 100644
--- a/src/intel/compiler/brw_disasm.c
+++ b/src/intel/compiler/brw_disasm.c
@@ -1606,7 +1606,12 @@ brw_disassemble_inst(FILE *file, const struct
gen_device_info *devinfo,
/* show the indirect descriptor source */
pad(file, 48);
err |= src1(file, devinfo, inst);
- }
+ pad(file, 64);
+ } else
+ pad(file, 48);
+
+ /* Print message descriptor as immediate source */
+ fprintf(file, "0x%08"PRIx64, inst->data[1] >> 32);
newline(file);
pad(file, 16);
@@ -1615,7 +1620,7 @@ brw_disassemble_inst(FILE *file, const struct
gen_device_info *devinfo,
fprintf(file, " ");
err |= control(file, "SFID", devinfo->gen >= 6 ? gen6_sfid : gen4_sfid,
sfid, &space);
-
+ string(file, " MsgDesc:");
if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
format(file, " indirect");
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