This commit just adds a miptail start field to isl_surf and wires it up
in the RENDER_SURFACE_STATE and 3DSTATE_DEPTH code. We also add a
minimum miptail LOD so that client drivers have a knob to control the
miptails a bit.
---
src/intel/isl/isl.c | 1 +
src/intel/isl/isl.h | 11 +++++++++++
src/intel/isl/isl_emit_depth_stencil.c | 2 +-
src/intel/isl/isl_surface_state.c | 5 +----
4 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 3d0741bc207..4a8380ad540 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -1653,6 +1653,7 @@ isl_surf_init_s(const struct isl_device *dev,
.row_pitch_B = row_pitch_B,
.array_pitch_el_rows = array_pitch_el_rows,
.array_pitch_span = array_pitch_span,
+ .miptail_start_level = 15,
.usage = info->usage,
};
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 213f5b408e2..4fb212e33d5 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -1145,6 +1145,9 @@ struct isl_surf_init_info {
/** Lower bound for isl_surf::alignment, in bytes. */
uint32_t min_alignment_B;
+ /** Lower bound for where to start the miptail */
+ uint32_t min_miptail_start_level;
+
/**
* Exact value for isl_surf::row_pitch. Ignored if zero. isl_surf_init()
* will fail if this is misaligned or out of bounds.
@@ -1219,6 +1222,14 @@ struct isl_surf {
enum isl_array_pitch_span array_pitch_span;
+ /**
+ * Level at which the miptail starts.
+ *
+ * This value is inclusive in the sense that the miptail contains this
+ * level.
+ */
+ uint32_t miptail_start_level;
+
/** Copy of isl_surf_init_info::usage. */
isl_surf_usage_flags_t usage;
};
diff --git a/src/intel/isl/isl_emit_depth_stencil.c
b/src/intel/isl/isl_emit_depth_stencil.c
index b07da781be8..c1a40ee20f0 100644
--- a/src/intel/isl/isl_emit_depth_stencil.c
+++ b/src/intel/isl/isl_emit_depth_stencil.c
@@ -115,7 +115,7 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device
*dev, void *batch,
/* We don't use miptails yet. The PRM recommends that you set "Mip Tail
* Start LOD" to 15 to prevent the hardware from trying to use them.
*/
- db.MipTailStartLOD = 15;
+ db.MipTailStartLOD = info->depth_surf->miptail_start_level;
#elif GEN_GEN >= 7
/* Gen7+ depth is always Y-tiled. We don't even have a bit for it */
#else
diff --git a/src/intel/isl/isl_surface_state.c
b/src/intel/isl/isl_surface_state.c
index abd4767acd7..b3e51d6f5e0 100644
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -423,10 +423,7 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev,
void *state,
}
#if GEN_GEN >= 9
- /* We don't use miptails yet. The PRM recommends that you set "Mip Tail
- * Start LOD" to 15 to prevent the hardware from trying to use them.
- */
- s.MipTailStartLOD = 15;
+ s.MipTailStartLOD = info->surf->miptail_start_level;
#endif
#if GEN_GEN >= 6
--
2.19.1
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