We need to do this in order to handle Yf and Ys tiling because they use
a four-dimensional tile instead of laying everything out in two
dimensions.
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
---
src/intel/blorp/blorp_blit.c | 8 ++-
src/intel/isl/isl.c | 52 ++++++++++++++++---
src/intel/isl/isl.h | 37 ++++++++++---
src/intel/isl/isl_storage_image.c | 6 ++-
.../tests/isl_surf_get_image_offset_test.c | 4 +-
src/mesa/drivers/dri/i965/intel_blit.c | 7 ++-
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 7 ++-
7 files changed, 98 insertions(+), 23 deletions(-)
diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index ae3e3c50930..8b8f76dec06 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/intel/blorp/blorp_blit.c
@@ -2108,11 +2108,15 @@ shrink_surface_params(const struct isl_device *dev,
*/
x_offset_sa = (uint32_t)*x0 * px_size_sa.w + info->tile_x_sa;
y_offset_sa = (uint32_t)*y0 * px_size_sa.h + info->tile_y_sa;
+ uint32_t tile_z_sa, tile_a;
isl_tiling_get_intratile_offset_sa(info->surf.tiling,
info->surf.format,
info->surf.row_pitch_B,
- x_offset_sa, y_offset_sa,
+ info->surf.array_pitch_el_rows,
+ x_offset_sa, y_offset_sa, 0, 0,
&byte_offset,
- &info->tile_x_sa, &info->tile_y_sa);
+ &info->tile_x_sa, &info->tile_y_sa,
+ &tile_z_sa, &tile_a);
+ assert(tile_z_sa == 0 && tile_a == 0);
info->addr.offset += byte_offset;
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index ffcede1ef61..a53fbf3da02 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -2093,7 +2093,9 @@ isl_surf_get_image_offset_sa(const struct isl_surf *surf,
uint32_t logical_array_layer,
uint32_t logical_z_offset_px,
uint32_t *x_offset_sa,
- uint32_t *y_offset_sa)
+ uint32_t *y_offset_sa,
+ uint32_t *z_offset_sa,
+ uint32_t *array_offset)
{
assert(level < surf->levels);
assert(logical_array_layer < surf->logical_level0_px.array_len);
@@ -2104,21 +2106,29 @@ isl_surf_get_image_offset_sa(const struct isl_surf
*surf,
case ISL_DIM_LAYOUT_GEN9_1D:
get_image_offset_sa_gen9_1d(surf, level, logical_array_layer,
x_offset_sa, y_offset_sa);
+ *z_offset_sa = 0;
+ *array_offset = 0;
break;
case ISL_DIM_LAYOUT_GEN4_2D:
get_image_offset_sa_gen4_2d(surf, level, logical_array_layer
+ logical_z_offset_px,
x_offset_sa, y_offset_sa);
+ *z_offset_sa = 0;
+ *array_offset = 0;
break;
case ISL_DIM_LAYOUT_GEN4_3D:
get_image_offset_sa_gen4_3d(surf, level, logical_array_layer +
logical_z_offset_px,
x_offset_sa, y_offset_sa);
+ *z_offset_sa = 0;
+ *array_offset = 0;
break;
case ISL_DIM_LAYOUT_GEN6_STENCIL_HIZ:
get_image_offset_sa_gen6_stencil_hiz(surf, level, logical_array_layer +
logical_z_offset_px,
x_offset_sa, y_offset_sa);
+ *z_offset_sa = 0;
+ *array_offset = 0;
break;
default:
@@ -2132,7 +2142,9 @@ isl_surf_get_image_offset_el(const struct isl_surf *surf,
uint32_t logical_array_layer,
uint32_t logical_z_offset_px,
uint32_t *x_offset_el,
- uint32_t *y_offset_el)
+ uint32_t *y_offset_el,
+ uint32_t *z_offset_el,
+ uint32_t *array_offset)
{
const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format);
@@ -2141,15 +2153,18 @@ isl_surf_get_image_offset_el(const struct isl_surf
*surf,
assert(logical_z_offset_px
< isl_minify(surf->logical_level0_px.depth, level));
- uint32_t x_offset_sa, y_offset_sa;
+ uint32_t x_offset_sa, y_offset_sa, z_offset_sa;
isl_surf_get_image_offset_sa(surf, level,
logical_array_layer,
logical_z_offset_px,
&x_offset_sa,
- &y_offset_sa);
+ &y_offset_sa,
+ &z_offset_sa,
+ array_offset);
*x_offset_el = x_offset_sa / fmtl->bw;
*y_offset_el = y_offset_sa / fmtl->bh;
+ *z_offset_el = z_offset_sa / fmtl->bd;
}
void
@@ -2196,18 +2211,29 @@ isl_surf_get_image_offset_B_tile_el(const struct
isl_surf *surf,
const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format);
uint32_t total_x_offset_el, total_y_offset_el;
+ uint32_t total_z_offset_el, total_array_offset;
isl_surf_get_image_offset_el(surf, level, logical_array_layer,
logical_z_offset_px,
&total_x_offset_el,
- &total_y_offset_el);
+ &total_y_offset_el,
+ &total_z_offset_el,
+ &total_array_offset);
+ uint32_t z_offset_el, array_offset;
isl_tiling_get_intratile_offset_el(surf->tiling, fmtl->bpb,
surf->row_pitch_B,
+ surf->array_pitch_el_rows,
total_x_offset_el,
total_y_offset_el,
+ total_z_offset_el,
+ total_array_offset,
offset_B,
x_offset_el,
- y_offset_el);
+ y_offset_el,
+ &z_offset_el,
+ &array_offset);
+ assert(z_offset_el == 0);
+ assert(array_offset == 0);
}
void
@@ -2255,18 +2281,26 @@ void
isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,
uint32_t bpb,
uint32_t row_pitch_B,
+ uint32_t array_pitch_el_rows,
uint32_t total_x_offset_el,
uint32_t total_y_offset_el,
+ uint32_t total_z_offset_el,
+ uint32_t total_array_offset,
uint32_t *base_address_offset,
uint32_t *x_offset_el,
- uint32_t *y_offset_el)
+ uint32_t *y_offset_el,
+ uint32_t *z_offset_el,
+ uint32_t *array_offset)
{
if (tiling == ISL_TILING_LINEAR) {
assert(bpb % 8 == 0);
+ assert(total_z_offset_el == 0 && total_array_offset == 0);
*base_address_offset = total_y_offset_el * row_pitch_B +
total_x_offset_el * (bpb / 8);
*x_offset_el = 0;
*y_offset_el = 0;
+ *z_offset_el = 0;
+ *array_offset = 0;
return;
}
@@ -2290,6 +2324,10 @@ isl_tiling_get_intratile_offset_el(enum isl_tiling
tiling,
/* Compute the offset into the tile */
*x_offset_el = total_x_offset_el % tile_info.logical_extent_el.w;
*y_offset_el = total_y_offset_el % tile_info.logical_extent_el.h;
+ assert(total_z_offset_el == 0);
+ assert(total_array_offset == 0);
+ *z_offset_el = 0;
+ *array_offset = 0;
/* Compute the offset of the tile in units of whole tiles */
uint32_t x_offset_tl = total_x_offset_el / tile_info.logical_extent_el.w;
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index df3f2f75d63..2476a22161a 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -1944,7 +1944,9 @@ isl_surf_get_image_offset_sa(const struct isl_surf *surf,
uint32_t logical_array_layer,
uint32_t logical_z_offset_px,
uint32_t *x_offset_sa,
- uint32_t *y_offset_sa);
+ uint32_t *y_offset_sa,
+ uint32_t *z_offset_sa,
+ uint32_t *array_offset);
/**
* Calculate the offset, in units of surface elements, to a subimage in the
@@ -1960,7 +1962,9 @@ isl_surf_get_image_offset_el(const struct isl_surf *surf,
uint32_t logical_array_layer,
uint32_t logical_z_offset_px,
uint32_t *x_offset_el,
- uint32_t *y_offset_el);
+ uint32_t *y_offset_el,
+ uint32_t *z_offset_el,
+ uint32_t *array_offset);
/**
* Calculate the offset, in bytes and intratile surface samples, to a
@@ -2040,21 +2044,31 @@ void
isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,
uint32_t bpb,
uint32_t row_pitch_B,
+ uint32_t array_pitch_el_rows,
uint32_t total_x_offset_el,
uint32_t total_y_offset_el,
+ uint32_t total_z_offset_el,
+ uint32_t total_array_offset,
uint32_t *base_address_offset,
uint32_t *x_offset_el,
- uint32_t *y_offset_el);
+ uint32_t *y_offset_el,
+ uint32_t *z_offset_el,
+ uint32_t *array_offset);
static inline void
isl_tiling_get_intratile_offset_sa(enum isl_tiling tiling,
enum isl_format format,
uint32_t row_pitch_B,
+ uint32_t array_pitch_el_rows,
uint32_t total_x_offset_sa,
uint32_t total_y_offset_sa,
+ uint32_t total_z_offset_sa,
+ uint32_t total_array_offset,
uint32_t *base_address_offset,
uint32_t *x_offset_sa,
- uint32_t *y_offset_sa)
+ uint32_t *y_offset_sa,
+ uint32_t *z_offset_sa,
+ uint32_t *array_offset)
{
const struct isl_format_layout *fmtl = isl_format_get_layout(format);
@@ -2064,15 +2078,22 @@ isl_tiling_get_intratile_offset_sa(enum isl_tiling
tiling,
*/
assert(total_x_offset_sa % fmtl->bw == 0);
assert(total_y_offset_sa % fmtl->bh == 0);
- const uint32_t total_x_offset = total_x_offset_sa / fmtl->bw;
- const uint32_t total_y_offset = total_y_offset_sa / fmtl->bh;
+ const uint32_t total_x_offset_el = total_x_offset_sa / fmtl->bw;
+ const uint32_t total_y_offset_el = total_y_offset_sa / fmtl->bh;
+ const uint32_t total_z_offset_el = total_z_offset_sa / fmtl->bd;
isl_tiling_get_intratile_offset_el(tiling, fmtl->bpb, row_pitch_B,
- total_x_offset, total_y_offset,
+ array_pitch_el_rows,
+ total_x_offset_el,
+ total_y_offset_el,
+ total_z_offset_el,
+ total_array_offset,
base_address_offset,
- x_offset_sa, y_offset_sa);
+ x_offset_sa, y_offset_sa,
+ z_offset_sa, array_offset);
*x_offset_sa *= fmtl->bw;
*y_offset_sa *= fmtl->bh;
+ *z_offset_sa *= fmtl->bd;
}
/**
diff --git a/src/intel/isl/isl_storage_image.c
b/src/intel/isl/isl_storage_image.c
index f8bb5275358..d9c45505a14 100644
--- a/src/intel/isl/isl_storage_image.c
+++ b/src/intel/isl/isl_storage_image.c
@@ -240,12 +240,16 @@ isl_surf_fill_image_param(const struct isl_device *dev,
view->array_len :
isl_minify(surf->logical_level0_px.d, view->base_level);
+ uint32_t tile_z_el, phys_array_layer;
isl_surf_get_image_offset_el(surf, view->base_level,
surf->dim == ISL_SURF_DIM_3D ?
0 : view->base_array_layer,
surf->dim == ISL_SURF_DIM_3D ?
view->base_array_layer : 0,
- ¶m->offset[0], ¶m->offset[1]);
+ ¶m->offset[0], ¶m->offset[1],
+ &tile_z_el, &phys_array_layer);
+ assert(tile_z_el == 0);
+ assert(phys_array_layer == 0);
const int cpp = isl_format_get_layout(surf->format)->bpb / 8;
param->stride[0] = cpp;
diff --git a/src/intel/isl/tests/isl_surf_get_image_offset_test.c
b/src/intel/isl/tests/isl_surf_get_image_offset_test.c
index 703f176c6b3..c9b50d4dabb 100644
--- a/src/intel/isl/tests/isl_surf_get_image_offset_test.c
+++ b/src/intel/isl/tests/isl_surf_get_image_offset_test.c
@@ -85,9 +85,9 @@ t_assert_offset_el(const struct isl_surf *surf,
uint32_t expected_x_offset_el,
uint32_t expected_y_offset_el)
{
- uint32_t x, y;
+ uint32_t x, y, z, a;
isl_surf_get_image_offset_el(surf, level, logical_array_layer,
- logical_z_offset_px, &x, &y);
+ logical_z_offset_px, &x, &y, &z, &a);
t_assert(x == expected_x_offset_el);
t_assert(y == expected_y_offset_el);
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c
b/src/mesa/drivers/dri/i965/intel_blit.c
index d2892c48d3b..1d5fe009d86 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -168,11 +168,16 @@ get_blit_intratile_offset_el(const struct brw_context
*brw,
uint32_t *x_offset_el,
uint32_t *y_offset_el)
{
+ uint32_t z_offset_el, array_offset;
isl_tiling_get_intratile_offset_el(mt->surf.tiling,
mt->cpp * 8, mt->surf.row_pitch_B,
+ mt->surf.array_pitch_el_rows,
total_x_offset_el, total_y_offset_el,
+ 0, 0,
base_address_offset,
- x_offset_el, y_offset_el);
+ x_offset_el, y_offset_el,
+ &z_offset_el, &array_offset);
+ assert(z_offset_el == 0 && array_offset == 0);
if (mt->surf.tiling == ISL_TILING_LINEAR) {
/* From the Broadwell PRM docs for XY_SRC_COPY_BLT::SourceBaseAddress:
*
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index e32641f4098..88d28c20807 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1326,7 +1326,7 @@ intel_miptree_get_image_offset(const struct
intel_mipmap_tree *mt,
return;
}
- uint32_t x_offset_sa, y_offset_sa;
+ uint32_t x_offset_sa, y_offset_sa, z_offset_sa, array_offset;
/* Miptree itself can have an offset only if it represents a single
* slice in an imported buffer object.
@@ -1344,10 +1344,13 @@ intel_miptree_get_image_offset(const struct
intel_mipmap_tree *mt,
const unsigned z = mt->surf.dim == ISL_SURF_DIM_3D ? slice : 0;
slice = mt->surf.dim == ISL_SURF_DIM_3D ? 0 : slice;
isl_surf_get_image_offset_el(&mt->surf, level, slice, z,
- &x_offset_sa, &y_offset_sa);
+ &x_offset_sa, &y_offset_sa,
+ &z_offset_sa, &array_offset);
*x = x_offset_sa;
*y = y_offset_sa;
+ assert(z_offset_sa == 0);
+ assert(array_offset == 0);
}
--
2.19.1
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