Test code is copy-pasted from configure.ac.
Signed-off-by: Tapani Pälli <tapani.pa...@intel.com>
---
meson.build | 37 ++++++++++++++++++++++++++-----------
1 file changed, 26 insertions(+), 11 deletions(-)
diff --git a/meson.build b/meson.build
index 0d534b9b4a9..4b6fb3781a1 100644
--- a/meson.build
+++ b/meson.build
@@ -844,19 +844,34 @@ foreach a : ['-Werror=pointer-arith', '-Werror=vla']
endif
endforeach
-if host_machine.cpu_family().startswith('x86')
- pre_args += '-DUSE_SSE41'
- with_sse41 = true
- sse41_args = ['-msse4.1']
+# sse41 defaults to false
+with_sse41 = false
+sse41_args = []
- # GCC on x86 (not x86_64) with -msse* assumes a 16 byte aligned stack, but
- # that's not guaranteed
- if host_machine.cpu_family() == 'x86'
- sse41_args += '-mstackrealign'
+# on x86, x86_64 test if we can support sse41
+if host_machine.cpu_family().startswith('x86')
+ code = '''#include <smmintrin.h>
+ int param;
+ int main () {
+ __m128i a = _mm_set1_epi32 (param), b = _mm_set1_epi32 (param +
1), c;
+ c = _mm_max_epu32(a, b);
+ return _mm_cvtsi128_si32(c);
+ }
+ '''
+ compiler = meson.get_compiler('c')
+ result = compiler.compiles(code, args: '-msse4.1', name : 'sse41 check')
+
+ if result == true
+ pre_args += '-DUSE_SSE41'
+ with_sse41 = true
+ sse41_args = ['-msse4.1']
+
+ # GCC on x86 (not x86_64) with -msse* assumes a 16 byte aligned stack, but
+ # that's not guaranteed
+ if host_machine.cpu_family() == 'x86'
+ sse41_args += '-mstackrealign'
+ endif
endif
-else
- with_sse41 = false
- sse41_args = []
endif
# Check for GCC style atomics
--
2.14.4
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