From: Ian Romanick <ian.d.roman...@intel.com>
No changes on any other Intel platforms.
Skylake
total instructions in shared programs: 14304261 -> 14304241 (<.01%)
instructions in affected programs: 1625 -> 1605 (-1.23%)
helped: 4
HURT: 0
helped stats (abs) min: 1 max: 8 x̄: 5.00 x̃: 5
helped stats (rel) min: 1.01% max: 14.29% x̄: 5.86% x̃: 4.07%
95% mean confidence interval for instructions value: -10.66 0.66
95% mean confidence interval for instructions %-change: -15.91% 4.19%
Inconclusive result (value mean confidence interval includes 0).
total cycles in shared programs: 527531226 -> 527531194 (<.01%)
cycles in affected programs: 92204 -> 92172 (-0.03%)
helped: 2
HURT: 0
Haswell and Broadwell had similar results. (Broadwell shown)
total instructions in shared programs: 14615730 -> 14615710 (<.01%)
instructions in affected programs: 1838 -> 1818 (-1.09%)
helped: 4
HURT: 0
helped stats (abs) min: 1 max: 8 x̄: 5.00 x̃: 5
helped stats (rel) min: 0.89% max: 13.04% x̄: 5.37% x̃: 3.78%
95% mean confidence interval for instructions value: -10.66 0.66
95% mean confidence interval for instructions %-change: -14.59% 3.85%
Inconclusive result (value mean confidence interval includes 0).
Signed-off-by: Ian Romanick <ian.d.roman...@intel.com>
---
src/intel/compiler/brw_fs_nir.cpp | 23 ++++++++++++++++++++---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/src/intel/compiler/brw_fs_nir.cpp
b/src/intel/compiler/brw_fs_nir.cpp
index 40889579d5c..7d2ba247d69 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -3895,11 +3895,28 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld,
nir_intrinsic_instr *instr
var->data.image.write_only ? GL_NONE : format);
} else {
int op;
+ unsigned num_srcs = info->num_srcs;
switch (instr->intrinsic) {
- case nir_intrinsic_image_deref_atomic_add:
+ case nir_intrinsic_image_deref_atomic_add: {
+ assert(num_srcs == 4);
+
op = BRW_AOP_ADD;
+
+ const nir_const_value *const val =
+ nir_src_as_const_value(instr->src[3]);
+ if (val != NULL) {
+ if (val->i32[0] == 1) {
+ op = BRW_AOP_INC;
+ num_srcs = 3;
+ } else if (val->i32[0] == -1) {
+ op = BRW_AOP_DEC;
+ num_srcs = 3;
+ }
+ }
+
break;
+ }
case nir_intrinsic_image_deref_atomic_min:
op = (get_image_base_type(type) == BRW_REGISTER_TYPE_D ?
BRW_AOP_IMIN : BRW_AOP_UMIN);
@@ -3927,10 +3944,10 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld,
nir_intrinsic_instr *instr
unreachable("Not reachable.");
}
- const fs_reg src0 = (info->num_srcs >= 4 ?
+ const fs_reg src0 = (num_srcs >= 4 ?
retype(get_nir_src(instr->src[3]), base_type) :
fs_reg());
- const fs_reg src1 = (info->num_srcs >= 5 ?
+ const fs_reg src1 = (num_srcs >= 5 ?
retype(get_nir_src(instr->src[4]), base_type) :
fs_reg());
--
2.14.4
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