From: "Muthukumar, Aravindan" <aravindan.muthuku...@intel.com>
The Patch here is to give control to user/ application to really
decide what's the max GPU load it would put. If that can be
known in advance, rpcs can be programmed accordingly.
This solution has changes across i915,
drm and mesa (not limited only to kernel).
Here, we pass gpu_load_type = {high, medium, low} from application
while context is created. Default here is 'High' and applications
roughly know if they are going to eat up entire GPU. The typical
usecase of 'Low' is idle screen or minor mouse movements. Users can
read meaning of high/medium/low for their platform & then program
contexts accordingly. Here gpu_load_type directly translates to
number of shader cores/EUs a particular GPU has.
V2 : changes for setting the loadtype through setparam.
Signed-off-by: Aravindan Muthukumar <aravindan.muthuku...@intel.com>
Signed-off-by: Kedar J Karanje <kedar.j.kara...@intel.com>
Signed-off-by: Praveen Diwakar <praveen.diwa...@intel.com>
Signed-off-by: Yogesh Marathe <yogesh.mara...@intel.com>
---
include/drm-uapi/i915_drm.h | 1 +
src/mesa/drivers/dri/i965/brw_bufmgr.c | 20 ++++++++++++++++++++
src/mesa/drivers/dri/i965/brw_bufmgr.h | 4 ++++
src/mesa/drivers/dri/i965/brw_context.c | 8 +++++++-
4 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
index 16e452a..737e78e 100644
--- a/include/drm-uapi/i915_drm.h
+++ b/include/drm-uapi/i915_drm.h
@@ -1453,6 +1453,7 @@ struct drm_i915_gem_context_param {
#define I915_CONTEXT_PARAM_NO_ERROR_CAPTURE 0x4
#define I915_CONTEXT_PARAM_BANNABLE 0x5
#define I915_CONTEXT_PARAM_PRIORITY 0x6
+#define I915_CONTEXT_PARAM_LOAD_TYPE 0x7
#define I915_CONTEXT_MAX_USER_PRIORITY 1023 /* inclusive */
#define I915_CONTEXT_DEFAULT_PRIORITY 0
#define I915_CONTEXT_MIN_USER_PRIORITY -1023 /* inclusive */
diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c
b/src/mesa/drivers/dri/i965/brw_bufmgr.c
index 8ba915b..8dd4bab 100644
--- a/src/mesa/drivers/dri/i965/brw_bufmgr.c
+++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c
@@ -1332,6 +1332,26 @@ brw_create_hw_context(struct brw_bufmgr *bufmgr)
return create.ctx_id;
}
+/* DYNAMIC EU CONTROL */
+int
+brw_hw_context_load_type(struct brw_bufmgr *bufmgr,
+ uint32_t ctx_id,
+ int load_type)
+{
+ struct drm_i915_gem_context_param p = {
+ .ctx_id = ctx_id,
+ .param = I915_CONTEXT_PARAM_LOAD_TYPE,
+ .value = load_type,
+ };
+ int err;
+
+ err = 0;
+ if(drmIoctl(bufmgr->fd, DRM_IOCTL_I915_GEM_CONTEXT_SETPARAM, &p))
+ err = -errno;
+
+ return err;
+}
+
int
brw_hw_context_set_priority(struct brw_bufmgr *bufmgr,
uint32_t ctx_id,
diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.h
b/src/mesa/drivers/dri/i965/brw_bufmgr.h
index 68f5e0c..9e9419b 100644
--- a/src/mesa/drivers/dri/i965/brw_bufmgr.h
+++ b/src/mesa/drivers/dri/i965/brw_bufmgr.h
@@ -313,6 +313,10 @@ int brw_bo_wait(struct brw_bo *bo, int64_t timeout_ns);
uint32_t brw_create_hw_context(struct brw_bufmgr *bufmgr);
+int brw_hw_context_load_type(struct brw_bufmgr *bufmgr,
+ uint32_t ctx_id,
+ int load_type);
+
int brw_hw_context_set_priority(struct brw_bufmgr *bufmgr,
uint32_t ctx_id,
int priority);
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 01a3e16..2ef21b6 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -888,7 +888,8 @@ brwCreateContext(gl_api api,
if (ctx_config->attribute_mask &
~(__DRIVER_CONTEXT_ATTRIB_RESET_STRATEGY |
- __DRIVER_CONTEXT_ATTRIB_PRIORITY)) {
+ __DRIVER_CONTEXT_ATTRIB_PRIORITY |
+ __DRIVER_CONTEXT_ATTRIB_LOAD_TYPE)) {
*dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_ATTRIBUTE;
return false;
}
@@ -1005,6 +1006,11 @@ brwCreateContext(gl_api api,
return false;
}
+ if(ctx_config->attribute_mask & __DRIVER_CONTEXT_ATTRIB_LOAD_TYPE) {
+ brw_hw_context_load_type(brw->bufmgr,
+ brw->hw_ctx,ctx_config->load_type);
+ }
+
int hw_priority = GEN_CONTEXT_MEDIUM_PRIORITY;
if (ctx_config->attribute_mask & __DRIVER_CONTEXT_ATTRIB_PRIORITY) {
switch (ctx_config->priority) {
--
2.7.4
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