Thanks. I've pushed this and made some changes to it. See below for
the changes I made.
On Wed, Jul 18, 2018 at 5:48 PM, Sonny Jiang <sonny.ji...@amd.com> wrote:
> Signed-off-by: Sonny Jiang <sonny.ji...@amd.com>
> ---
> src/gallium/drivers/radeonsi/si_build_pm4.h | 24 ++++++++++++++++++++++++
> src/gallium/drivers/radeonsi/si_gfx_cs.c | 3 +++
> src/gallium/drivers/radeonsi/si_state.h | 1 +
> src/gallium/drivers/radeonsi/si_state_shaders.c | 21 +++++++++++++--------
> 4 files changed, 41 insertions(+), 8 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_build_pm4.h
> b/src/gallium/drivers/radeonsi/si_build_pm4.h
> index b339cd5..8fc08f7 100644
> --- a/src/gallium/drivers/radeonsi/si_build_pm4.h
> +++ b/src/gallium/drivers/radeonsi/si_build_pm4.h
> @@ -214,4 +214,28 @@ static inline void radeon_opt_set_context_reg4(struct
> si_context *sctx, unsigned
> }
> }
>
> +/**
> + * Set consecutive registers if any registers value is different.
> + */
> +static inline void radeon_opt_set_context_regn(struct si_context *sctx,
> unsigned offset,
> + unsigned * value, unsigned *
> saved_val,
I removed the space between * and variables, because * is a variable qualifier.
Example: int i, *a, *b, *c, x, **y;
> + unsigned num)
> +{
> + struct radeon_cmdbuf *cs = sctx->gfx_cs;
> + int i, j;
> +
> + for (i = 0; i < num; i++) {
> + if (saved_val[i] != value[i]) {
> + radeon_set_context_reg_seq(cs, offset, num);
> + for (j = 0; j < num; j++) {
> + radeon_emit(cs, value[j]);
> + }
I removed { and } for the single-line block.
> +
> + memcpy(saved_val, value, sizeof(uint32_t) * num);
> +
> + break;
I removed the empty line.
> + }
> + }
> +}
> +
> #endif
> diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c
> b/src/gallium/drivers/radeonsi/si_gfx_cs.c
> index 628b6c5..16aa4f9 100644
> --- a/src/gallium/drivers/radeonsi/si_gfx_cs.c
> +++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c
> @@ -353,4 +353,7 @@ void si_begin_new_gfx_cs(struct si_context *ctx)
> /* Set all saved registers state to unknown. */
> ctx->tracked_regs.reg_saved = 0;
> }
> +
> + /* 0xffffffff is a impossible value to register SPI_PS_INPUT_CNTL_n */
> + memset(ctx->tracked_regs.reg_val_seq, 0xff, sizeof(uint32_t) * 32);
> }
> diff --git a/src/gallium/drivers/radeonsi/si_state.h
> b/src/gallium/drivers/radeonsi/si_state.h
> index 71056c7..c2d0287 100644
> --- a/src/gallium/drivers/radeonsi/si_state.h
> +++ b/src/gallium/drivers/radeonsi/si_state.h
> @@ -287,6 +287,7 @@ enum si_tracked_reg {
> struct si_tracked_regs {
> uint32_t reg_saved;
> uint32_t reg_value[SI_NUM_TRACKED_REGS];
> + uint32_t reg_val_seq[32];
I renamed reg_val_seq to spi_ps_input_cntl, because the variable only
stores those registers and no others.
Marek
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